From f06f2d72be705963c9dc3f9a42fed660bdc88c56 Mon Sep 17 00:00:00 2001 From: tangxifan Date: Mon, 20 Apr 2020 13:16:52 -0600 Subject: [PATCH] deploy single mode in regression tests --- .travis/script.sh | 3 +++ 1 file changed, 3 insertions(+) diff --git a/.travis/script.sh b/.travis/script.sh index b577ee48c..fd9b8616e 100755 --- a/.travis/script.sh +++ b/.travis/script.sh @@ -51,6 +51,9 @@ echo -e "Testing OpenFPGA Shell"; echo -e "Testing configuration chain of a K4N4 FPGA"; python3 openfpga_flow/scripts/run_fpga_task.py openfpga_shell/configuration_chain --debug --show_thread_logs +echo -e "Testing Verilog generation for a single mode LUT6 FPGA using micro benchmarks"; +python3 openfpga_flow/scripts/run_fpga_task.py openfpga_shell/single_mode --debug --show_thread_logs + echo -e "Testing Verilog generation with simple fracturable LUT6 "; python3 openfpga_flow/scripts/run_fpga_task.py openfpga_shell/frac_lut --debug --show_thread_logs