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[Test] Adapt pin constraints due to changes in pin names

This commit is contained in:
tangxifan 2022-02-15 16:06:46 -08:00
parent b533fd17d5
commit f002c79a61
1 changed files with 1 additions and 1 deletions
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2
openfpga_flow/tasks/basic_tests/global_tile_ports/global_tile_4clock/config/counter_2clock_pin_constraints.xml
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@ -7,6 +7,6 @@
<set_io pin="clk[1]" net="clk1"/>
<set_io pin="clk[2]" net="OPEN"/>
<set_io pin="clk[3]" net="OPEN"/>
<set_io pin="reset[0]" net="rst0"/>
<set_io pin="reset[0]" net="rst"/>
</pin_constraints>