diff --git a/openfpga/src/annotation/device_rr_gsb.cpp b/openfpga/src/annotation/device_rr_gsb.cpp index 086f4cd5b..78ce8e16b 100644 --- a/openfpga/src/annotation/device_rr_gsb.cpp +++ b/openfpga/src/annotation/device_rr_gsb.cpp @@ -45,7 +45,7 @@ const RRGSB& DeviceRRGSB::get_gsb(const size_t& x, const size_t& y) const { /* Get a rr switch block in the array with a coordinate */ const RRGSB& DeviceRRGSB::get_gsb_by_cb_coordinate( - const t_rr_type& cb_type, const vtr::Point& coordinate) const { + const vtr::Point& coordinate) const { vtr::Point gsb_coord = coordinate; VTR_ASSERT(validate_coordinate(gsb_coord)); diff --git a/openfpga/src/annotation/device_rr_gsb.h b/openfpga/src/annotation/device_rr_gsb.h index 245b1646b..b278985c6 100644 --- a/openfpga/src/annotation/device_rr_gsb.h +++ b/openfpga/src/annotation/device_rr_gsb.h @@ -40,7 +40,7 @@ class DeviceRRGSB { const; /* Get a rr switch block in the array with a coordinate */ /* Get a gsb using its connection block coordinate */ const RRGSB& get_gsb_by_cb_coordinate( - const t_rr_type& cb_type, const vtr::Point& coordinate) const; + const vtr::Point& coordinate) const; size_t get_num_gsb_unique_module() const; /* get the number of unique mirrors of GSB */ size_t get_num_sb_unique_module() diff --git a/openfpga/src/fabric/build_top_module_child_tile_instance.cpp b/openfpga/src/fabric/build_top_module_child_tile_instance.cpp index 1530a70bf..9e1f9b225 100644 --- a/openfpga/src/fabric/build_top_module_child_tile_instance.cpp +++ b/openfpga/src/fabric/build_top_module_child_tile_instance.cpp @@ -1253,7 +1253,7 @@ static int build_top_module_global_net_from_tile_clock_arch_tree( /* Get the tile module and instance at the entry point */ const RRGSB& rr_gsb = device_rr_gsb.get_gsb_by_cb_coordinate( - entry_track_type, vtr::Point(entry_point.x(), entry_point.y())); + vtr::Point(entry_point.x(), entry_point.y())); vtr::Point cb_coord_in_tile = rr_gsb.get_sb_coordinate(); FabricTileId curr_fabric_tile_id = fabric_tile.find_tile_by_cb_coordinate( entry_track_type, cb_coord_in_tile); diff --git a/openfpga/src/fabric/build_top_module_connection.cpp b/openfpga/src/fabric/build_top_module_connection.cpp index 027078093..a52833e37 100644 --- a/openfpga/src/fabric/build_top_module_connection.cpp +++ b/openfpga/src/fabric/build_top_module_connection.cpp @@ -1289,7 +1289,7 @@ static int build_top_module_global_net_from_clock_arch_tree( /* Get the connection block module and instance at the entry point */ vtr::Point entry_cb_coord(entry_point.x(), entry_point.y()); const RRGSB& rr_gsb = device_rr_gsb.get_gsb_by_cb_coordinate( - entry_track_type, entry_cb_coord); + entry_cb_coord); vtr::Point entry_unique_cb_coord = device_rr_gsb.get_cb_unique_module(entry_track_type, entry_cb_coord) .get_cb_coordinate(entry_track_type);