add ignore_net to repackdesign constraint

libs/libpcf/src/base/repack_design_constraints.cpp

@@ -54,6 +54,11 @@ std::string RepackDesignConstraints::net(
   return repack_design_constraint_nets_[repack_design_constraint_id];
 }
 
+std::map<std::string, std::vector<std::string>>
+RepackDesignConstraints::ignore_net_pin_map() const {
+  return ignore_net_pin_map_;
+}
+
 std::string RepackDesignConstraints::find_constrained_pin_net(
   const std::string& pb_type, const openfpga::BasicPort& pin) const {
   std::string constrained_net_name;
@@ -138,6 +143,10 @@ void RepackDesignConstraints::set_net(
   repack_design_constraint_nets_[repack_design_constraint_id] = net;
 }
 
+void RepackDesignConstraints::set_ignore_net_pin_map_(
+  const std::string& net_name, const std::string pin_ctx) {
+  ignore_net_pin_map_[net_name].push_back(pin_ctx);
+}
 /************************************************************************
  * Internal invalidators/validators
  ***********************************************************************/

libs/libpcf/src/base/repack_design_constraints.h

@@ -69,6 +69,7 @@ class RepackDesignConstraints {
   std::string net(
     const RepackDesignConstraintId& repack_design_constraint_id) const;
 
+  std::map<std::string, std::vector<std::string>> ignore_net_pin_map() const;
   /* Find a constrained net */
   std::string find_constrained_pin_net(const std::string& pb_type,
                                        const openfpga::BasicPort& pin) const;
@@ -98,6 +99,9 @@ class RepackDesignConstraints {
   void set_net(const RepackDesignConstraintId& repack_design_constraint_id,
                const std::string& net);
 
+  void set_ignore_net_pin_map_(const std::string& net_name,
+                               const std::string pin_ctx);
+
  public: /* Public invalidators/validators */
   bool valid_design_constraint_id(
     const RepackDesignConstraintId& repack_design_constraint_id) const;
@@ -135,6 +139,8 @@ class RepackDesignConstraints {
   /* Nets to constraint */
   vtr::vector<RepackDesignConstraintId, std::string>
     repack_design_constraint_nets_;
+
+  std::map<std::string, std::vector<std::string>> ignore_net_pin_map_;
 };
 
 #endif

libs/libpcf/src/io/read_xml_repack_design_constraints.cpp

@@ -80,11 +80,17 @@ RepackDesignConstraints read_xml_repack_design_constraints(
 
     for (pugi::xml_node xml_design_constraint : xml_root.children()) {
       /* Error out if the XML child has an invalid name! */
-      if (xml_design_constraint.name() != std::string("pin_constraint")) {
+      if (xml_design_constraint.name() == std::string("pin_constraint")) {
-        bad_tag(xml_design_constraint, loc_data, xml_root, {"pin_constraint"});
+        read_xml_pin_constraint(xml_design_constraint, loc_data,
+                                repack_design_constraints);
+      } else if (xml_design_constraint.name() == std::string("ignore_net")) {
+        repack_design_constraints.set_ignore_net_pin_map_(
+          get_attribute(xml_design_constraint, "name", loc_data).as_string(),
+          get_attribute(xml_design_constraint, "pin", loc_data).as_string());
+      } else {
+        bad_tag(xml_design_constraint, loc_data, xml_root,
+                {"pin_constraint", "ignore_net"});
       }
-      read_xml_pin_constraint(xml_design_constraint, loc_data,
-                              repack_design_constraints);
     }
   } catch (pugiutil::XmlError& e) {
     archfpga_throw(design_constraint_fname, e.line(), "%s", e.what());

openfpga/src/repack/repack.cpp

@@ -575,10 +575,13 @@ static void add_lb_router_nets(
     /* Only for global net which should be ignored, cache the sink nodes */
     BasicPort curr_pin(std::string(source_pb_pin->port->name),
                        source_pb_pin->pin_number, source_pb_pin->pin_number);
-    if ((clustering_ctx.clb_nlist.net_is_ignored(cluster_net_id)) &&
+if ((clustering_ctx.clb_nlist.net_is_ignored(cluster_net_id) &&
-        (clustering_ctx.clb_nlist.net_is_global(cluster_net_id)) &&
+         clustering_ctx.clb_nlist.net_is_global(cluster_net_id) &&
-        (options.is_pin_ignore_global_nets(std::string(lb_type->pb_type->name),
+         options.is_pin_ignore_global_nets(std::string(lb_type->pb_type->name),
-                                           curr_pin))) {
+                                           curr_pin)) ||
+        (options.net_is_specified_to_be_ignored(
+          atom_ctx.nlist.net_name(pb_pin_mapped_nets[source_pb_pin]),
+          std::string(lb_type->pb_type->name), curr_pin))){
       /* Find the net mapped to this pin in clustering results*/
       AtomNetId atom_net_id = pb_pin_mapped_nets[source_pb_pin];
 

openfpga/src/repack/repack_option.cpp

@@ -46,6 +46,60 @@ bool RepackOption::is_pin_ignore_global_nets(const std::string& pb_type_name,
   return false;
 }
 
+bool RepackOption::net_is_specified_to_be_ignored(std::string cluster_net_name,
+                                                  std::string pb_type_name,
+                                                  const BasicPort& port) const {
+  if (cluster_net_name == "rst_n") int tt = 0;
+  auto result = design_constraints_.ignore_net_pin_map().find(cluster_net_name);
+  if (result == design_constraints_.ignore_net_pin_map().end()) {
+    /* Not found, return false */
+    return false;
+  } else {
+    int num_parse_errors_temp = 0;
+    /* Split the content using a tokenizer */
+    auto pin_ctx_to_parse =
+      design_constraints_.ignore_net_pin_map()[cluster_net_name];
+    for (auto pin_ctx_to_parse_iter : pin_ctx_to_parse) {
+      StringToken tokenizer(pin_ctx_to_parse_iter);
+      std::vector<std::string> tokens = tokenizer.split(',');
+      /* Parse each token */
+      for (std::string token : tokens) {
+        /* Extract the pb_type name and port name */
+        StringToken pin_tokenizer(token);
+        std::vector<std::string> pin_info = pin_tokenizer.split('.');
+        /* Expect two contents, otherwise error out */
+        if (pin_info.size() != 2) {
+          std::string err_msg =
+            std::string("Invalid content '") + token +
+            std::string("' to skip, expect <pb_type_name>.<pin>\n");
+          VTR_LOG_ERROR(err_msg.c_str());
+          num_parse_errors_temp++;
+          continue;
+        }
+        std::string curr_pb_type_name = pin_info[0];
+        PortParser port_parser(pin_info[1]);
+        BasicPort curr_port = port_parser.port();
+        if (!curr_port.is_valid()) {
+          std::string err_msg =
+            std::string("Invalid pin definition '") + token +
+            std::string("', expect <pb_type_name>.<pin_name>[int:int]\n");
+          VTR_LOG_ERROR(err_msg.c_str());
+          num_parse_errors_temp++;
+          continue;
+        }
+        // if (curr_pb_type_name == pb_type_name && curr_port == port) {
+        //   return true;
+        // }
+        if (curr_port.mergeable(port) && curr_port.contained(port) &&
+            curr_pb_type_name == pb_type_name) {
+          return true;
+        }
+      }
+    }
+  }
+  return false;
+}
+
 bool RepackOption::verbose_output() const { return verbose_output_; }
 
 /******************************************************************************

openfpga/src/repack/repack_option.h

@@ -25,6 +25,9 @@ class RepackOption {
   /* Identify if a pin should ignore all the global nets */
   bool is_pin_ignore_global_nets(const std::string& pb_type_name,
                                  const BasicPort& pin) const;
+  bool net_is_specified_to_be_ignored(
+    std::string cluster_net_name, std::string pb_type_name,
+    const BasicPort& port) const;
   bool verbose_output() const;
 
  public: /* Public mutators */