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add net accessor and mutators to module manager

This commit is contained in:
tangxifan 2019-10-09 21:14:30 -06:00
parent 557d8b60f3
commit edad988ebb
2 changed files with 56 additions and 2 deletions
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49
vpr7_x2p/vpr/SRC/fpga_x2p/base/module_manager.cpp
View File

@ -120,6 +120,42 @@ std::string ModuleManager::port_preproc_flag(const ModuleId& module, const Modul
return port_preproc_flags_[module][port]; return port_preproc_flags_[module][port];
} }
/* Find a net from an instance of a module */
ModuleNetId ModuleManager::module_instance_port_net(const ModuleId& parent_module,
const ModuleId& child_module, const size_t& child_instance,
const ModulePortId& child_port, const size_t& child_pin) const {
/* Validate parent_module */
VTR_ASSERT(valid_module_id(parent_module));
/* Validate child_module */
VTR_ASSERT(valid_module_id(child_module));
/* Validate instance id */
if (child_module == parent_module) {
/* Assume a default instance id as zero */
VTR_ASSERT(0 == child_instance);
} else {
VTR_ASSERT(child_instance < num_instance(parent_module, child_module));
}
/* Validate child_port */
VTR_ASSERT(valid_module_port_id(child_module, child_port));
/* Validate child_pin */
VTR_ASSERT(child_pin < module_port(child_module, child_port).get_width());
return net_lookup_[parent_module][child_module][child_instance][child_port][child_pin];
}
/* Find the name of net */
std::string ModuleManager::net_name(const ModuleId& module, const ModuleNetId& net) const {
/* Validate module net */
VTR_ASSERT(valid_module_net_id(module, net));
return net_names_[module][net];
}
/****************************************************************************** /******************************************************************************
* Public Mutators * Public Mutators
******************************************************************************/ ******************************************************************************/
@ -196,7 +232,7 @@ ModulePortId ModuleManager::add_port(const ModuleId& module,
/* Update fast look-up for nets */ /* Update fast look-up for nets */
VTR_ASSERT_SAFE(1 == net_lookup_[module][module].size()); VTR_ASSERT_SAFE(1 == net_lookup_[module][module].size());
net_lookup_[module][module][0][port].resize(port_info.get_width()); net_lookup_[module][module][0][port].resize(port_info.get_width(), ModuleNetId::INVALID());
return port; return port;
} }
@ -261,7 +297,7 @@ void ModuleManager::add_child_module(const ModuleId& parent_module, const Module
/* Find the ports for the child module and update the fast look-up */ /* Find the ports for the child module and update the fast look-up */
for (ModulePortId child_port : port_ids_[child_module]) { for (ModulePortId child_port : port_ids_[child_module]) {
net_lookup_[parent_module][child_module].emplace_back(); net_lookup_[parent_module][child_module].emplace_back();
net_lookup_[parent_module][child_module][instance_id][child_port].resize(ports_[child_module][child_port].get_width()); net_lookup_[parent_module][child_module][instance_id][child_port].resize(ports_[child_module][child_port].get_width(), ModuleNetId::INVALID());
} }
} }
@ -289,6 +325,15 @@ ModuleNetId ModuleManager::create_module_net(const ModuleId& module) {
return net; return net;
} }
/* Set the name of net */
void ModuleManager::set_net_name(const ModuleId& module, const ModuleNetId& net,
const std::string& name) {
/* Validate module net */
VTR_ASSERT(valid_module_net_id(module, net));
net_names_[module][net] = name;
}
/* Add a source to a net in the connection graph */ /* Add a source to a net in the connection graph */
void ModuleManager::add_module_net_source(const ModuleId& module, const ModuleNetId& net, void ModuleManager::add_module_net_source(const ModuleId& module, const ModuleNetId& net,
const ModuleId& src_module, const size_t& instance_id, const ModuleId& src_module, const size_t& instance_id,

9
vpr7_x2p/vpr/SRC/fpga_x2p/base/module_manager.h
View File

@ -52,6 +52,12 @@ class ModuleManager {
bool port_is_register(const ModuleId& module, const ModulePortId& port) const; bool port_is_register(const ModuleId& module, const ModulePortId& port) const;
/* Return the pre-processing flag of a port */ /* Return the pre-processing flag of a port */
std::string port_preproc_flag(const ModuleId& module, const ModulePortId& port) const; std::string port_preproc_flag(const ModuleId& module, const ModulePortId& port) const;
/* Find a net from an instance of a module */
ModuleNetId module_instance_port_net(const ModuleId& parent_module,
const ModuleId& child_module, const size_t& child_instance,
const ModulePortId& child_port, const size_t& child_pin) const;
/* Find the name of net */
std::string net_name(const ModuleId& module, const ModuleNetId& net) const;
public: /* Public mutators */ public: /* Public mutators */
/* Add a module */ /* Add a module */
ModuleId add_module(const std::string& name); ModuleId add_module(const std::string& name);
@ -70,6 +76,9 @@ class ModuleManager {
void add_child_module(const ModuleId& parent_module, const ModuleId& child_module); void add_child_module(const ModuleId& parent_module, const ModuleId& child_module);
/* Add a net to the connection graph of the module */ /* Add a net to the connection graph of the module */
ModuleNetId create_module_net(const ModuleId& module); ModuleNetId create_module_net(const ModuleId& module);
/* Set the name of net */
void set_net_name(const ModuleId& module, const ModuleNetId& net,
const std::string& name);
/* Add a source to a net in the connection graph */ /* Add a source to a net in the connection graph */
void add_module_net_source(const ModuleId& module, const ModuleNetId& net, void add_module_net_source(const ModuleId& module, const ModuleNetId& net,
const ModuleId& src_module, const size_t& instance_id, const ModuleId& src_module, const size_t& instance_id,