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[Doc] Update README about new keyword about fracturable LUT

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tangxifan 2020-11-25 22:12:56 -07:00
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openfpga_flow/vpr_arch/README.md
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# Naming convention for VPR architecture files # Naming convention for VPR architecture files
Please reveal the following architecture features in the names to help quickly spot architecture files. Please reveal the following architecture features in the names to help quickly spot architecture files.
- k<lut\_size>\_<frac>: Look-Up Table (LUT) size of FPGA. If you have fracturable LUTs or multiple LUT circuits, this should be largest input size. The keyword 'frac' is to specify if fracturable LUT is used or not. - k<lut\_size>\_<frac><Native>: Look-Up Table (LUT) size of FPGA. If you have fracturable LUTs or multiple LUT circuits, this should be largest input size.
* The keyword 'frac' is to specify if fracturable LUT is used or not.
* The keyword 'Native' is to specify if fracturable LUT design is a native one (without mode switch) or a standard one (with mode switch).
- N<le\_size>: Number of logic elements for a CLB. If you have multiple CLB architectures, this should be largest number. - N<le\_size>: Number of logic elements for a CLB. If you have multiple CLB architectures, this should be largest number.
- tileable: If the routing architecture is tileable or not. - tileable: If the routing architecture is tileable or not.
- adder\_chain: If hard adder/carry chain is used inside CLBs - adder\_chain: If hard adder/carry chain is used inside CLBs