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docs/source/tutorials/arch_modeling/user_defined_temp_tutorial.rst
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.. tutorial_user_def_temp:
Integrating Custom Verilog Modules with user_defined_template.v Integrating Custom Verilog Modules with user_defined_template.v
================================================================ ================================================================
.. only:: html
.. youtube:: YTggSZHsTjg
Introduction and Setup Introduction and Setup
~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~
**In this tutorial, we will** **In this tutorial, we will**