[Architecture] Patch frame based using ccff
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@ -146,7 +146,7 @@
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<port type="sram" prefix="sram" size="16"/>
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<port type="sram" prefix="sram" size="16"/>
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</circuit_model>
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</circuit_model>
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<!--Scan-chain DFF subckt ports should be defined as <D> <Q> <Qb> <CLK> <RESET> <SET> -->
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<!--Scan-chain DFF subckt ports should be defined as <D> <Q> <Qb> <CLK> <RESET> <SET> -->
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<circuit_model type="ccff" name="DFF_EN" prefix="DFF_EN" spice_netlist="${OPENFPGA_PATH}/openfpga_flow/SpiceNetlists/DFF_EN.sp" verilog_netlist="${OPENFPGA_PATH}/openfpga_flow/VerilogNetlists/DFF_EN.v">
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<circuit_model type="sram" name="DFF_EN" prefix="DFF_EN" spice_netlist="${OPENFPGA_PATH}/openfpga_flow/SpiceNetlists/DFF_EN.sp" verilog_netlist="${OPENFPGA_PATH}/openfpga_flow/VerilogNetlists/DFF_EN.v">
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<design_technology type="cmos"/>
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<design_technology type="cmos"/>
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<input_buffer exist="true" circuit_model_name="INVTX1"/>
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<input_buffer exist="true" circuit_model_name="INVTX1"/>
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<output_buffer exist="true" circuit_model_name="INVTX1"/>
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<output_buffer exist="true" circuit_model_name="INVTX1"/>
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