diff --git a/openfpga/src/fpga_bitstream/fabric_bitstream.h b/openfpga/src/fpga_bitstream/fabric_bitstream.h index bc0c8c6df..b00732e7e 100644 --- a/openfpga/src/fpga_bitstream/fabric_bitstream.h +++ b/openfpga/src/fpga_bitstream/fabric_bitstream.h @@ -224,15 +224,12 @@ class FabricBitstream { * - bit-x number: which encodes the 'x' bits into a number. For example, * 101x1 -> 00010 -> 2 * - * TODO: There is a limitation here, when the length of address vector is more than 64, - * A size_t number overflows (cannot represent any binary number > 64 bit). - * Such thing can entirely happen even in a medium sized FPGA. - * A solution can be use multiple size_t to fit. But clearly, we should not use vector in vector, which causes large memory overhead! + * Note that when the length of address vector is more than 64, we use multiple 64-bit data to store the encoded values */ - vtr::vector bit_address_1bits_; - vtr::vector bit_address_xbits_; - vtr::vector bit_wl_address_1bits_; - vtr::vector bit_wl_address_xbits_; + vtr::vector> bit_address_1bits_; + vtr::vector> bit_address_xbits_; + vtr::vector> bit_wl_address_1bits_; + vtr::vector> bit_wl_address_xbits_; /* Data input (Din) bits: this is designed for memory decoders */ vtr::vector bit_dins_;