[core] refactor codes
This commit is contained in:
tangxifan
parent
7892c2340c
commit
e75fd57af2
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@ -78,6 +78,201 @@ static int build_clock_tree_net_map(
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return CMD_EXEC_SUCCESS;
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return CMD_EXEC_SUCCESS;
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}
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}
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/********************************************************************
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* Route a selected clock spine in a staight line
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* - route the spine from the starting point to the ending point
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*******************************************************************/
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static int route_straight_spines(
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VprRoutingAnnotation& vpr_routing_annotation, const RRGraphView& rr_graph,
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const RRClockSpatialLookup& clk_rr_lookup,
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const ClockNetwork& clk_ntwk, const ClockTreeId& clk_tree,
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const ClockSpineId& ispine, const ClockTreePinId& ipin,
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const bool& verbose) {
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std::vector<vtr::Point<int>> spine_coords =
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clk_ntwk.spine_coordinates(ispine);
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VTR_LOGV(verbose, "Routing backbone of spine '%s'...\n",
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clk_ntwk.spine_name(ispine).c_str());
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for (size_t icoord = 0; icoord < spine_coords.size() - 1; ++icoord) {
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vtr::Point<int> src_coord = spine_coords[icoord];
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vtr::Point<int> des_coord = spine_coords[icoord + 1];
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Direction src_spine_direction = clk_ntwk.spine_direction(ispine);
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Direction des_spine_direction = clk_ntwk.spine_direction(ispine);
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ClockLevelId src_spine_level = clk_ntwk.spine_level(ispine);
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ClockLevelId des_spine_level = clk_ntwk.spine_level(ispine);
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RRNodeId src_node =
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clk_rr_lookup.find_node(src_coord.x(), src_coord.y(), clk_tree,
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src_spine_level, ipin, src_spine_direction);
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RRNodeId des_node =
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clk_rr_lookup.find_node(des_coord.x(), des_coord.y(), clk_tree,
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des_spine_level, ipin, des_spine_direction);
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VTR_ASSERT(rr_graph.valid_node(src_node));
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VTR_ASSERT(rr_graph.valid_node(des_node));
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vpr_routing_annotation.set_rr_node_prev_node(rr_graph, des_node,
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src_node);
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}
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return CMD_EXEC_SUCCESS;
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}
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/********************************************************************
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* Route a switching points between spines
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* - connect between two routing tracks (left or right turns)
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* - connect internal driver to routing track
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*******************************************************************/
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static int route_spine_switch_points(
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VprRoutingAnnotation& vpr_routing_annotation, const RRGraphView& rr_graph,
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const RRClockSpatialLookup& clk_rr_lookup,
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const vtr::vector<RRNodeId, ClusterNetId>& rr_node_gnets,
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const std::map<ClockTreePinId, ClusterNetId>& tree2clk_pin_map,
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const ClockNetwork& clk_ntwk, const ClockTreeId& clk_tree,
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const ClockSpineId& ispine, const ClockTreePinId& ipin,
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const bool& verbose) {
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VTR_LOGV(verbose, "Routing switch points of spine '%s'...\n",
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clk_ntwk.spine_name(ispine).c_str());
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for (ClockSwitchPointId switch_point_id :
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clk_ntwk.spine_switch_points(ispine)) {
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vtr::Point<int> src_coord =
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clk_ntwk.spine_switch_point(ispine, switch_point_id);
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ClockSpineId des_spine =
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clk_ntwk.spine_switch_point_tap(ispine, switch_point_id);
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vtr::Point<int> des_coord = clk_ntwk.spine_start_point(des_spine);
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Direction src_spine_direction = clk_ntwk.spine_direction(ispine);
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Direction des_spine_direction = clk_ntwk.spine_direction(des_spine);
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ClockLevelId src_spine_level = clk_ntwk.spine_level(ispine);
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ClockLevelId des_spine_level = clk_ntwk.spine_level(des_spine);
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RRNodeId src_node =
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clk_rr_lookup.find_node(src_coord.x(), src_coord.y(), clk_tree,
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src_spine_level, ipin, src_spine_direction);
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RRNodeId des_node =
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clk_rr_lookup.find_node(des_coord.x(), des_coord.y(), clk_tree,
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des_spine_level, ipin, des_spine_direction);
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VTR_ASSERT(rr_graph.valid_node(src_node));
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VTR_ASSERT(rr_graph.valid_node(des_node));
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/* Internal drivers may appear at the switch point. Check if there are
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* any defined and related rr_node found as incoming edges. If the
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* global net is mapped to the internal driver, use it as the previous
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* node */
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size_t use_int_driver = 0;
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if (!clk_ntwk
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.spine_switch_point_internal_drivers(ispine, switch_point_id)
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.empty() &&
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tree2clk_pin_map.find(ipin) != tree2clk_pin_map.end()) {
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for (RREdgeId cand_edge : rr_graph.node_in_edges(des_node)) {
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RRNodeId opin_node = rr_graph.edge_src_node(cand_edge);
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if (OPIN != rr_graph.node_type(opin_node)) {
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continue;
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}
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if (rr_node_gnets[opin_node] != tree2clk_pin_map.at(ipin)) {
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continue;
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}
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/* This is the opin node we need, use it as the internal driver */
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vpr_routing_annotation.set_rr_node_prev_node(rr_graph, des_node,
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opin_node);
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vpr_routing_annotation.set_rr_node_net(opin_node,
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tree2clk_pin_map.at(ipin));
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vpr_routing_annotation.set_rr_node_net(des_node,
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tree2clk_pin_map.at(ipin));
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use_int_driver++;
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VTR_LOGV(verbose, "Routing switch points of spine '%s' at the switching point (%lu, %lu) using internal driver\n",
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clk_ntwk.spine_name(ispine).c_str(), src_coord.x(), src_coord.y());
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}
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}
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if (use_int_driver > 1) {
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VTR_LOG_ERROR(
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"Found %lu internal drivers for the switching point (%lu, %lu) for "
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"spine '%s'!\n Expect only 1!\n",
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use_int_driver, src_coord.x(), src_coord.y(),
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clk_ntwk.spine_name(ispine).c_str());
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return CMD_EXEC_FATAL_ERROR;
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}
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if (use_int_driver == 1) {
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continue; /* Used internal driver, early pass */
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}
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vpr_routing_annotation.set_rr_node_prev_node(rr_graph, des_node,
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src_node);
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/* It could happen that there is no net mapped some clock pin, skip the
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* net mapping */
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if (tree2clk_pin_map.find(ipin) != tree2clk_pin_map.end()) {
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vpr_routing_annotation.set_rr_node_net(src_node,
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tree2clk_pin_map.at(ipin));
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vpr_routing_annotation.set_rr_node_net(des_node,
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tree2clk_pin_map.at(ipin));
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}
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}
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return CMD_EXEC_SUCCESS;
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}
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/********************************************************************
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* Route a spine to its tap points
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* - Only connect to tap points which are mapped by a global net
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*******************************************************************/
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static int route_spine_taps(
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VprRoutingAnnotation& vpr_routing_annotation, const RRGraphView& rr_graph,
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const RRClockSpatialLookup& clk_rr_lookup,
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const vtr::vector<RRNodeId, ClusterNetId>& rr_node_gnets,
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const std::map<ClockTreePinId, ClusterNetId>& tree2clk_pin_map,
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const ClockNetwork& clk_ntwk, const ClockTreeId& clk_tree,
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const ClockSpineId& ispine, const ClockTreePinId& ipin,
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const bool& verbose) {
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std::vector<vtr::Point<int>> spine_coords =
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clk_ntwk.spine_coordinates(ispine);
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/* Route the spine-to-IPIN connections (only for the last level) */
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if (clk_ntwk.is_last_level(ispine)) {
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VTR_LOGV(verbose, "Routing clock taps of spine '%s'...\n",
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clk_ntwk.spine_name(ispine).c_str());
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/* Connect to any fan-out node which is IPIN */
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for (size_t icoord = 0; icoord < spine_coords.size(); ++icoord) {
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vtr::Point<int> src_coord = spine_coords[icoord];
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Direction src_spine_direction = clk_ntwk.spine_direction(ispine);
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ClockLevelId src_spine_level = clk_ntwk.spine_level(ispine);
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RRNodeId src_node =
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clk_rr_lookup.find_node(src_coord.x(), src_coord.y(), clk_tree,
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src_spine_level, ipin, src_spine_direction);
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for (RREdgeId edge : rr_graph.edge_range(src_node)) {
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RRNodeId des_node = rr_graph.edge_sink_node(edge);
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if (rr_graph.node_type(des_node) == IPIN) {
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/* Check if the IPIN is mapped, if not, do not connect */
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/* if the IPIN is mapped, only connect when net mapping is
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* expected */
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if (tree2clk_pin_map.find(ipin) == tree2clk_pin_map.end()) {
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VTR_LOGV(verbose,
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"Skip routing clock tap of spine '%s' as the tree is "
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"not used\n",
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clk_ntwk.spine_name(ispine).c_str());
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continue;
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}
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if (!rr_node_gnets[des_node]) {
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VTR_LOGV(verbose,
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"Skip routing clock tap of spine '%s' as the IPIN is "
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"not mapped\n",
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clk_ntwk.spine_name(ispine).c_str());
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continue;
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}
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if (rr_node_gnets[des_node] != tree2clk_pin_map.at(ipin)) {
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VTR_LOGV(verbose,
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"Skip routing clock tap of spine '%s' as the net "
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"mapping does not match clock net\n",
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clk_ntwk.spine_name(ispine).c_str());
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continue;
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}
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VTR_ASSERT(rr_graph.valid_node(src_node));
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VTR_ASSERT(rr_graph.valid_node(des_node));
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vpr_routing_annotation.set_rr_node_prev_node(rr_graph, des_node,
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src_node);
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if (tree2clk_pin_map.find(ipin) != tree2clk_pin_map.end()) {
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vpr_routing_annotation.set_rr_node_net(
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src_node, tree2clk_pin_map.at(ipin));
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vpr_routing_annotation.set_rr_node_net(
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des_node, tree2clk_pin_map.at(ipin));
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}
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}
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}
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}
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}
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return CMD_EXEC_SUCCESS;
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}
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/********************************************************************
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/********************************************************************
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* Route a clock tree on an existing routing resource graph
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* Route a clock tree on an existing routing resource graph
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* The strategy is to route spine one by one
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* The strategy is to route spine one by one
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@ -106,151 +301,16 @@ static int route_clock_tree_rr_graph(
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/* Route the spine from starting point to ending point */
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/* Route the spine from starting point to ending point */
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std::vector<vtr::Point<int>> spine_coords =
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std::vector<vtr::Point<int>> spine_coords =
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clk_ntwk.spine_coordinates(ispine);
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clk_ntwk.spine_coordinates(ispine);
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VTR_LOGV(verbose, "Routing backbone of spine '%s'...\n",
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if (CMD_EXEC_SUCCESS != route_straight_spines(vpr_routing_annotation, rr_graph, clk_rr_lookup, clk_ntwk, clk_tree, ispine, ipin, verbose)) {
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clk_ntwk.spine_name(ispine).c_str());
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return CMD_EXEC_FATAL_ERROR;
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for (size_t icoord = 0; icoord < spine_coords.size() - 1; ++icoord) {
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vtr::Point<int> src_coord = spine_coords[icoord];
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vtr::Point<int> des_coord = spine_coords[icoord + 1];
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Direction src_spine_direction = clk_ntwk.spine_direction(ispine);
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Direction des_spine_direction = clk_ntwk.spine_direction(ispine);
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ClockLevelId src_spine_level = clk_ntwk.spine_level(ispine);
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ClockLevelId des_spine_level = clk_ntwk.spine_level(ispine);
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RRNodeId src_node =
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clk_rr_lookup.find_node(src_coord.x(), src_coord.y(), clk_tree,
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src_spine_level, ipin, src_spine_direction);
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RRNodeId des_node =
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clk_rr_lookup.find_node(des_coord.x(), des_coord.y(), clk_tree,
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des_spine_level, ipin, des_spine_direction);
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VTR_ASSERT(rr_graph.valid_node(src_node));
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VTR_ASSERT(rr_graph.valid_node(des_node));
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vpr_routing_annotation.set_rr_node_prev_node(rr_graph, des_node,
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src_node);
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}
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}
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/* Route the spine-to-spine switching points */
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/* Route the opin/spine-to-spine switching points */
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VTR_LOGV(verbose, "Routing switch points of spine '%s'...\n",
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if (CMD_EXEC_SUCCESS != route_spine_switch_points(vpr_routing_annotation, rr_graph, clk_rr_lookup, rr_node_gnets, tree2clk_pin_map, clk_ntwk, clk_tree, ispine, ipin, verbose)) {
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clk_ntwk.spine_name(ispine).c_str());
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return CMD_EXEC_FATAL_ERROR;
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for (ClockSwitchPointId switch_point_id :
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clk_ntwk.spine_switch_points(ispine)) {
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vtr::Point<int> src_coord =
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clk_ntwk.spine_switch_point(ispine, switch_point_id);
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ClockSpineId des_spine =
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clk_ntwk.spine_switch_point_tap(ispine, switch_point_id);
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vtr::Point<int> des_coord = clk_ntwk.spine_start_point(des_spine);
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Direction src_spine_direction = clk_ntwk.spine_direction(ispine);
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Direction des_spine_direction = clk_ntwk.spine_direction(des_spine);
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ClockLevelId src_spine_level = clk_ntwk.spine_level(ispine);
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ClockLevelId des_spine_level = clk_ntwk.spine_level(des_spine);
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RRNodeId src_node =
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clk_rr_lookup.find_node(src_coord.x(), src_coord.y(), clk_tree,
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src_spine_level, ipin, src_spine_direction);
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RRNodeId des_node =
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clk_rr_lookup.find_node(des_coord.x(), des_coord.y(), clk_tree,
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des_spine_level, ipin, des_spine_direction);
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VTR_ASSERT(rr_graph.valid_node(src_node));
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VTR_ASSERT(rr_graph.valid_node(des_node));
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/* Internal drivers may appear at the switch point. Check if there are
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* any defined and related rr_node found as incoming edges. If the
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* global net is mapped to the internal driver, use it as the previous
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* node */
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size_t use_int_driver = 0;
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if (!clk_ntwk
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.spine_switch_point_internal_drivers(ispine, switch_point_id)
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.empty() &&
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tree2clk_pin_map.find(ipin) != tree2clk_pin_map.end()) {
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for (RREdgeId cand_edge : rr_graph.node_in_edges(des_node)) {
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RRNodeId opin_node = rr_graph.edge_src_node(cand_edge);
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if (OPIN != rr_graph.node_type(opin_node)) {
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continue;
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}
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if (rr_node_gnets[opin_node] != tree2clk_pin_map.at(ipin)) {
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continue;
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}
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/* This is the opin node we need, use it as the internal driver */
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vpr_routing_annotation.set_rr_node_prev_node(rr_graph, des_node,
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opin_node);
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vpr_routing_annotation.set_rr_node_net(opin_node,
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tree2clk_pin_map.at(ipin));
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vpr_routing_annotation.set_rr_node_net(des_node,
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tree2clk_pin_map.at(ipin));
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use_int_driver++;
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VTR_LOGV(verbose, "Routing switch points of spine '%s' at the switching point (%lu, %lu) using internal driver\n",
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clk_ntwk.spine_name(ispine).c_str(), src_coord.x(), src_coord.y());
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}
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}
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if (use_int_driver > 1) {
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VTR_LOG_ERROR(
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"Found %lu internal drivers for the switching point (%lu, %lu) for "
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"spine '%s'!\n Expect only 1!\n",
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use_int_driver, src_coord.x(), src_coord.y(),
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clk_ntwk.spine_name(ispine).c_str());
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return CMD_EXEC_FATAL_ERROR;
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}
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if (use_int_driver == 1) {
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continue; /* Used internal driver, early pass */
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}
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vpr_routing_annotation.set_rr_node_prev_node(rr_graph, des_node,
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src_node);
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/* It could happen that there is no net mapped some clock pin, skip the
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* net mapping */
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if (tree2clk_pin_map.find(ipin) != tree2clk_pin_map.end()) {
|
|
||||||
vpr_routing_annotation.set_rr_node_net(src_node,
|
|
||||||
tree2clk_pin_map.at(ipin));
|
|
||||||
vpr_routing_annotation.set_rr_node_net(des_node,
|
|
||||||
tree2clk_pin_map.at(ipin));
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
/* Route the spine-to-IPIN connections (only for the last level) */
|
/* Route the spine-to-IPIN connections (only for the last level) */
|
||||||
if (clk_ntwk.is_last_level(ispine)) {
|
if (CMD_EXEC_SUCCESS != route_spine_taps(vpr_routing_annotation, rr_graph, clk_rr_lookup, rr_node_gnets, tree2clk_pin_map, clk_ntwk, clk_tree, ispine, ipin, verbose)) {
|
||||||
VTR_LOGV(verbose, "Routing clock taps of spine '%s'...\n",
|
return CMD_EXEC_FATAL_ERROR;
|
||||||
clk_ntwk.spine_name(ispine).c_str());
|
|
||||||
/* Connect to any fan-out node which is IPIN */
|
|
||||||
for (size_t icoord = 0; icoord < spine_coords.size(); ++icoord) {
|
|
||||||
vtr::Point<int> src_coord = spine_coords[icoord];
|
|
||||||
Direction src_spine_direction = clk_ntwk.spine_direction(ispine);
|
|
||||||
ClockLevelId src_spine_level = clk_ntwk.spine_level(ispine);
|
|
||||||
RRNodeId src_node =
|
|
||||||
clk_rr_lookup.find_node(src_coord.x(), src_coord.y(), clk_tree,
|
|
||||||
src_spine_level, ipin, src_spine_direction);
|
|
||||||
for (RREdgeId edge : rr_graph.edge_range(src_node)) {
|
|
||||||
RRNodeId des_node = rr_graph.edge_sink_node(edge);
|
|
||||||
if (rr_graph.node_type(des_node) == IPIN) {
|
|
||||||
/* Check if the IPIN is mapped, if not, do not connect */
|
|
||||||
/* if the IPIN is mapped, only connect when net mapping is
|
|
||||||
* expected */
|
|
||||||
if (tree2clk_pin_map.find(ipin) == tree2clk_pin_map.end()) {
|
|
||||||
VTR_LOGV(verbose,
|
|
||||||
"Skip routing clock tap of spine '%s' as the tree is "
|
|
||||||
"not used\n",
|
|
||||||
clk_ntwk.spine_name(ispine).c_str());
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
if (!rr_node_gnets[des_node]) {
|
|
||||||
VTR_LOGV(verbose,
|
|
||||||
"Skip routing clock tap of spine '%s' as the IPIN is "
|
|
||||||
"not mapped\n",
|
|
||||||
clk_ntwk.spine_name(ispine).c_str());
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
if (rr_node_gnets[des_node] != tree2clk_pin_map.at(ipin)) {
|
|
||||||
VTR_LOGV(verbose,
|
|
||||||
"Skip routing clock tap of spine '%s' as the net "
|
|
||||||
"mapping does not match clock net\n",
|
|
||||||
clk_ntwk.spine_name(ispine).c_str());
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
VTR_ASSERT(rr_graph.valid_node(src_node));
|
|
||||||
VTR_ASSERT(rr_graph.valid_node(des_node));
|
|
||||||
vpr_routing_annotation.set_rr_node_prev_node(rr_graph, des_node,
|
|
||||||
src_node);
|
|
||||||
if (tree2clk_pin_map.find(ipin) != tree2clk_pin_map.end()) {
|
|
||||||
vpr_routing_annotation.set_rr_node_net(
|
|
||||||
src_node, tree2clk_pin_map.at(ipin));
|
|
||||||
vpr_routing_annotation.set_rr_node_net(
|
|
||||||
des_node, tree2clk_pin_map.at(ipin));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue