write sb

openfpga/src/annotation/device_rr_gsb.cpp

@@ -569,7 +569,7 @@ void DeviceRRGSB::preload_unique_cb_module(
   /* Add to list if this is a unique mirror*/
   size_t limit_x;
   size_t limit_y;
-  switch(cb_type){
+  switch (cb_type) {
     case CHANX:
       limit_x = cby_unique_module_id_.size();
       limit_y = cby_unique_module_id_[0].size();
@@ -621,4 +621,26 @@ void DeviceRRGSB::preload_unique_sb_module(
   }
 }
 
+void DeviceRRGSB::get_id_unique_block_map(
+  std::map<int, vtr::Point<size_t>>& id_unique_block_map) const {
+  for (size_t id = 0; id < get_num_sb_unique_module(); ++id) {
+    const auto& unique_block_coord = sb_unique_module_[id];
+    auto unique_module_id =
+      sb_unique_module_id_[unique_block_coord.x()][unique_block_coord.y()];
+    id_unique_block_map[unique_module_id] = unique_block_coord;
+  }
+}
+
+void DeviceRRGSB::get_id_instance_map(
+  std::map<int, std::vector<vtr::Point<size_t>>>& id_instance_map) const {
+  for (size_t location_x = 0; location_x < sb_unique_module_id_.size();
+       ++location_x) {
+    for (size_t location_y = 0; location_y < sb_unique_module_id_[0].size();
+         ++location_y) {
+      auto unique_module_id = sb_unique_module_id_[location_x][location_y];
+      vtr::Point<size_t> instance_coord(location_x, location_y);
+      id_instance_map[unique_module_id].push_back(instance_coord);
+    }
+  }
+}
 } /* End namespace openfpga*/

openfpga/src/annotation/device_rr_gsb.h

@@ -103,6 +103,11 @@ class DeviceRRGSB {
     const vtr::Point<size_t> block_coordinate,
     const std::vector<vtr::Point<size_t>> instance_coords);
 
+  void get_id_instance_map(
+    std::map<int, std::vector<vtr::Point<size_t>>>& id_instance_map) const;
+  void get_id_unique_block_map(
+    std::map<int, vtr::Point<size_t>>& id_unique_block_map) const;
+
  private:                                                /* Internal cleaners */
   void clear_gsb();                                      /* clean the content */
   void clear_cb_unique_module(const t_rr_type& cb_type); /* clean the content */

openfpga/src/base/openfpga_build_fabric_template.h

@@ -517,11 +517,10 @@ int write_unique_blocks_template(T& openfpga_ctx, const Command& cmd,
   std::string file_type = cmd_context.option_value(cmd, opt_type);
 
   /* Write hierarchy to a file */
-  return read_xml_unique_blocks(openfpga_ctx, file_name.c_str(),
+  return write_xml_unique_blocks(openfpga_ctx, file_name.c_str(),
                                 file_type.c_str(),
                                 cmd_context.option_enable(cmd, opt_verbose));
 }
-
 } /* end namespace openfpga */
 
 #endif

openfpga/src/fabric/read_xml_unique_blocks.h

@@ -27,6 +27,8 @@
 #include "read_xml_unique_blocks.h"
 #include "read_xml_util.h"
 #include "rr_gsb.h"
+#include "write_xml_utils.h"
+#include "openfpga_digest.h"
 
 /********************************************************************
  * Parse XML codes of a <instance> to an object of unique_blocks
@@ -157,4 +159,71 @@ int read_xml_unique_blocks(T& openfpga_ctx, const char* file_name,
   return 0;
 }
 
+
+template <class T>
+int write_xml_sb_blocks(std::fstream& fp, const T& openfpga_ctx) {
+  std::map<int, vtr::Point<size_t>> id_unique_block_map;
+  std::map<int, std::vector<vtr::Point<size_t>>> id_instance_map;
+  openfpga_ctx.device_rr_gsb().get_id_unique_block_map(id_unique_block_map);
+  openfpga_ctx.device_rr_gsb().get_id_instance_map(id_instance_map);
+
+  /* Validate the file stream */
+  if (false == openfpga::valid_file_stream(fp)) {
+    return 2;
+  }
+  for (const auto& pair : id_unique_block_map) {
+    openfpga::write_tab_to_file(fp, 1);
+    fp << "<block";
+    write_xml_attribute(fp, "type", "sb");
+    write_xml_attribute(fp, "x", pair.second.x());
+    write_xml_attribute(fp, "y", pair.second.y());
+
+    fp << "/>"
+       << "\n";
+
+    for (const auto& instance_info : id_instance_map[pair.first]) {
+      openfpga::write_tab_to_file(fp, 2);
+      fp << "<instance";
+      write_xml_attribute(fp, "x", instance_info.x());
+      write_xml_attribute(fp, "y", instance_info.y());
+
+      fp << "/>"
+         << "\n";
+    }
+  }
+
+  return 0;
+}
+
+template <class T>
+int write_xml_unique_blocks(const T& openfpga_ctx, const char* fname,
+                            const char* file_type, bool verbose_output) {
+  vtr::ScopedStartFinishTimer timer("Write unique blocks...");
+
+  /* Create a file handler */
+  std::fstream fp;
+  /* Open the file stream */
+  fp.open(std::string(fname), std::fstream::out | std::fstream::trunc);
+
+  /* Validate the file stream */
+  openfpga::check_file_stream(fname, fp);
+
+  /* Write the root node */
+  fp << "<unique_blocks>"
+     << "\n";
+
+  int err_code = 0;
+  
+  err_code += write_xml_sb_blocks(fp, openfpga_ctx);
+
+  /* Finish writing the root node */
+  fp << "</unique_blocks>"
+     << "\n";
+
+  /* Close the file stream */
+  fp.close();
+
+  return err_code;
+}
+
 #endif