[Test] Deploy MCNC big20 to the micro benchmark regression test

This commit is contained in:
tangxifan 2021-06-22 16:36:04 -06:00
parent f06017581c
commit e34fbf8ecf
2 changed files with 7 additions and 8 deletions

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@ -136,9 +136,3 @@ run-task fpga_verilog/fully_connected_output_crossbar --debug --show_thread_logs
echo -e "Testing through channels in tileable routing";
run-task fpga_verilog/thru_channel/thru_narrow_tile --debug --show_thread_logs
run-task fpga_verilog/thru_channel/thru_wide_tile --debug --show_thread_logs
# Verify MCNC big20 benchmark suite with ModelSim
# Please make sure you have ModelSim installed in the environment
# Otherwise, it will fail
#run-task fpga_verilog/mcnc_big20 --debug --show_thread_logs --maxthreads 20
#python3 openfpga_flow/scripts/run_modelsim.py mcnc_big20 --run_sim

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@ -7,6 +7,11 @@ PYTHON_EXEC=python3.8
# OpenFPGA Shell with VPR8
##############################################
echo -e "Micro benchmark regression tests";
# TODO: enable this when flow-run script support same top module name in one task configuration file
#run-task benchmark_sweep/counter --debug --show_thread_logs
run-task benchmark_sweep/counter --debug --show_thread_logs
run-task benchmark_sweep/mac_units --debug --show_thread_logs
# Verify MCNC big20 benchmark suite with ModelSim
# Please make sure you have ModelSim installed in the environment
# Otherwise, it will fail
run-task benchmark_sweep/mcnc_big20 --debug --show_thread_logs
#python3 openfpga_flow/scripts/run_modelsim.py mcnc_big20 --run_sim