From df3ae60954849c7bf83d799b0c37abd3f23a75cb Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Wed, 12 Feb 2020 15:19:40 -0700
Subject: [PATCH] add default configurable memory model set-up when reading
 openfpga architecture XML

---
 .../src/openfpga_arch_linker.cpp              | 47 +++++++++++++++++++
 .../src/openfpga_arch_linker.h                |  3 ++
 .../src/read_xml_openfpga_arch.cpp            |  7 +++
 3 files changed, 57 insertions(+)

diff --git a/libopenfpga/libarchopenfpga/src/openfpga_arch_linker.cpp b/libopenfpga/libarchopenfpga/src/openfpga_arch_linker.cpp
index 27b065053..90ae1aad3 100644
--- a/libopenfpga/libarchopenfpga/src/openfpga_arch_linker.cpp
+++ b/libopenfpga/libarchopenfpga/src/openfpga_arch_linker.cpp
@@ -3,6 +3,8 @@
  * data structures inside the openfpga arch data structure
  *******************************************************************/
 #include "vtr_log.h"
+#include "vtr_assert.h"
+
 #include "openfpga_arch_linker.h"
 
 /********************************************************************
@@ -21,3 +23,48 @@ void link_config_protocol_to_circuit_library(openfpga::Arch& openfpga_arch) {
 
   openfpga_arch.config_protocol.set_memory_model(config_memory_model); 
 }
+
+/********************************************************************
+ * Link the circuit model of SRAM ports of each circuit model
+ * to a default SRAM circuit model.
+ * This function aims to ease the XML writing, allowing users to skip
+ * the circuit model definition for SRAM ports that are used by default
+ * TODO: Maybe deprecated as we prefer strict definition 
+ *******************************************************************/
+void config_circuit_models_sram_port_to_default_sram_model(CircuitLibrary& circuit_lib,
+                                                           const CircuitModelId& default_sram_model) {
+  VTR_ASSERT(CircuitModelId::INVALID() != default_sram_model);
+
+  for (const auto& model : circuit_lib.models()) {
+    for (const auto& port : circuit_lib.model_ports(model)) {
+      /* Bypass non SRAM ports */
+      if (CIRCUIT_MODEL_PORT_SRAM != circuit_lib.port_type(port)) {
+        continue;
+      }
+
+      /* Write for the default SRAM SPICE model! */
+      circuit_lib.set_port_tri_state_model_id(port, default_sram_model);
+
+      /* Only show warning when we try to override the given spice_model_name ! */ 
+      if (true == circuit_lib.port_tri_state_model_name(port).empty()) { 
+        VTR_LOG("Use the default configurable memory model '%s' for circuit model '%s' port '%s')\n",
+                circuit_lib.model_name(default_sram_model).c_str(),
+                circuit_lib.model_name(model).c_str(),
+                circuit_lib.port_prefix(port).c_str());
+        continue;
+      }
+
+      /* Give a warning !!! */
+      if (circuit_lib.model_name(default_sram_model) != circuit_lib.port_tri_state_model_name(port)) {
+        VTR_LOG_WARN("Overwrite SRAM circuit model for circuit model port (name:%s, port:%s) to be the correct one (name:%s)!\n",
+                     circuit_lib.model_name(model).c_str(),
+                     circuit_lib.port_prefix(port).c_str(),
+                     circuit_lib.model_name(default_sram_model).c_str());
+      }
+    }
+  }
+  /* Rebuild the submodels for circuit_library
+   * because we have created links for ports 
+   */
+  circuit_lib.build_model_links();
+}
diff --git a/libopenfpga/libarchopenfpga/src/openfpga_arch_linker.h b/libopenfpga/libarchopenfpga/src/openfpga_arch_linker.h
index fea97330a..52e49cb66 100644
--- a/libopenfpga/libarchopenfpga/src/openfpga_arch_linker.h
+++ b/libopenfpga/libarchopenfpga/src/openfpga_arch_linker.h
@@ -5,4 +5,7 @@
 
 void link_config_protocol_to_circuit_library(openfpga::Arch& openfpga_arch);
 
+void config_circuit_models_sram_port_to_default_sram_model(CircuitLibrary& circuit_lib,
+                                                           const CircuitModelId& default_sram_model);
+
 #endif
diff --git a/libopenfpga/libarchopenfpga/src/read_xml_openfpga_arch.cpp b/libopenfpga/libarchopenfpga/src/read_xml_openfpga_arch.cpp
index f30ff4f1e..b35955f97 100644
--- a/libopenfpga/libarchopenfpga/src/read_xml_openfpga_arch.cpp
+++ b/libopenfpga/libarchopenfpga/src/read_xml_openfpga_arch.cpp
@@ -70,6 +70,13 @@ openfpga::Arch read_xml_openfpga_arch(const char* arch_file_name) {
     /* Build the internal link between configuration protocol and circuit library */
     link_config_protocol_to_circuit_library(openfpga_arch);
 
+    /* Now, we can know the default configurable memory model 
+     * Apply it to all the SRAM ports of circuit models
+     */
+    config_circuit_models_sram_port_to_default_sram_model(openfpga_arch.circuit_lib,
+                                                          openfpga_arch.config_protocol.memory_model());
+    
+
     /* Parse the connection block circuit definition */
     openfpga_arch.cb_switch2circuit = read_xml_cb_switch_circuit(xml_openfpga_arch, loc_data,
                                                                  openfpga_arch.circuit_lib);