add custom pin location to the flagship vpr arch with frac mem and dsp
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@ -223,7 +223,14 @@
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<input name="b" num_pins="36"/>
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<output name="out" num_pins="72"/>
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<fc in_type="frac" in_val="0.15" out_type="frac" out_val="0.10"/>
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<pinlocations pattern="spread"/>
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<!-- Highly recommand to customize pin location when direct connection is used!!! -->
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<!--pinlocations pattern="spread"/-->
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<pinlocations pattern="custom">
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<loc side="left"></loc>
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<loc side="top"></loc>
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<loc side="right">mult_36.a[0:17] mult_36.b[0:17] mult_36.out[0:35]</loc>
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<loc side="bottom">mult_36.a[18:35] mult_36.b[18:35] mult_36.out[36:71]</loc>
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</pinlocations>
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</tile>
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<tile name="memory" height="6" area="548000">
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<equivalent_sites>
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@ -237,7 +244,14 @@
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<output name="out" num_pins="64"/>
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<clock name="clk" num_pins="1"/>
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<fc in_type="frac" in_val="0.15" out_type="frac" out_val="0.10"/>
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<pinlocations pattern="spread"/>
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<!-- Highly recommand to customize pin location when direct connection is used!!! -->
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<!--pinlocations pattern="spread"/-->
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<pinlocations pattern="custom">
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<loc side="left"></loc>
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<loc side="top">memory.clk</loc>
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<loc side="right">memory.addr1[0:14] memory.data[0:31] memory.we1 memory.out[0:31]</loc>
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<loc side="bottom">memory.addr2[0:14] memory.data[32:63] memory.we2 memory.out[32:63]</loc>
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</pinlocations>
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</tile>
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</tiles>
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<!-- ODIN II specific config ends -->
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