riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Update k4_frac_N4_adder_chain_mem1K_frac_dsp32_40nm_frame_openfpga.xml 

Mode port assertions should be bind with "physical_mode_port_rotate_offset" instead of "physical_mode_pin_rotate_offset".
This commit is contained in:
mustafa.arslan 2022-10-13 14:00:59 +03:00 committed by GitHub
parent 6f55371d4b
commit d7a253408d
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 6 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
openfpga_flow/openfpga_arch/k4_frac_N4_adder_chain_mem1K_frac_dsp32_40nm_frame_openfpga.xml
View File

@ -286,18 +286,18 @@
of the input/output of the 32x32 multiplier of the input/output of the 32x32 multiplier
--> -->
<pb_type name="mult_32[two_divisible_mult_16x16].divisible_mult_16x16[two_mult_8x8].mult_8x8_slice.mult_8x8" physical_pb_type_name="mult_32[mult_32x32].mult_32x32_slice.mult_32x32" mode_bits="01" physical_pb_type_index_factor="0"> <pb_type name="mult_32[two_divisible_mult_16x16].divisible_mult_16x16[two_mult_8x8].mult_8x8_slice.mult_8x8" physical_pb_type_name="mult_32[mult_32x32].mult_32x32_slice.mult_32x32" mode_bits="01" physical_pb_type_index_factor="0">
<port name="a" physical_mode_port="a[0:7]" physical_mode_pin_rotate_offset="8"/> <port name="a" physical_mode_port="a[0:7]" physical_mode_port_rotate_offset="8"/>
<port name="b" physical_mode_port="b[0:7]" physical_mode_pin_rotate_offset="8"/> <port name="b" physical_mode_port="b[0:7]" physical_mode_port_rotate_offset="8"/>
<port name="out" physical_mode_port="out[0:15]" physical_mode_pin_rotate_offset="16"/> <port name="out" physical_mode_port="out[0:15]" physical_mode_port_rotate_offset="16"/>
</pb_type> </pb_type>
<!-- Bind the 16x16 multiplier to the physical 32x32 multiplier <!-- Bind the 16x16 multiplier to the physical 32x32 multiplier
There are two 16x16 multipliers, each of which occupies part There are two 16x16 multipliers, each of which occupies part
of the input/output of the 32x32 multiplier of the input/output of the 32x32 multiplier
--> -->
<pb_type name="mult_32[two_divisible_mult_16x16].divisible_mult_16x16[mult_16x16].mult_16x16_slice.mult_16x16" physical_pb_type_name="mult_32[mult_32x32].mult_32x32_slice.mult_32x32" mode_bits="10" physical_pb_type_index_factor="0"> <pb_type name="mult_32[two_divisible_mult_16x16].divisible_mult_16x16[mult_16x16].mult_16x16_slice.mult_16x16" physical_pb_type_name="mult_32[mult_32x32].mult_32x32_slice.mult_32x32" mode_bits="10" physical_pb_type_index_factor="0">
<port name="a" physical_mode_port="a[0:15]" physical_mode_pin_rotate_offset="16"/> <port name="a" physical_mode_port="a[0:15]" physical_mode_port_rotate_offset="16"/>
<port name="b" physical_mode_port="b[0:15]" physical_mode_pin_rotate_offset="16"/> <port name="b" physical_mode_port="b[0:15]" physical_mode_port_rotate_offset="16"/>
<port name="out" physical_mode_port="out[0:31]" physical_mode_pin_rotate_offset="32"/> <port name="out" physical_mode_port="out[0:31]" physical_mode_port_rotate_offset="32"/>
</pb_type> </pb_type>
<!-- END physical pb_type binding in complex block dsp --> <!-- END physical pb_type binding in complex block dsp -->
</pb_type_annotations> </pb_type_annotations>