Run tests in parallel
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@ -138,9 +138,20 @@ jobs:
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runs-on: ubuntu-18.04
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container: ghcr.io/lnis-uofu/openfpga-buildenv-test
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needs: linux_build
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defaults:
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run:
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shell: bash
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strategy:
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fail-fast: false
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matrix:
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config:
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- name: "Basic Regression Tests: GCC-8 (Ubuntu 18.04)"
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script: basic_reg_test.sh
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- name: "FPGA-Verilog Regression Tests: GCC-8 (Ubuntu 18.04)"
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script: fpga_verilog_reg_test.sh
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- name: "FPGA-Bitstream Regression Tests: GCC-8 (Ubuntu 18.04)"
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script: fpga_bitstream_reg_test.sh
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- name: "FPGA-SDC Regression Tests: GCC-8 (Ubuntu 18.04)"
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script: fpga_sdc_reg_test.sh
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- name: "FPGA-SPICE Regression Tests: GCC-8 (Ubuntu 18.04)"
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script: fpga_spice_reg_test.sh
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steps:
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- name: Checkout OpenFPGA repo
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uses: actions/checkout@v2
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@ -159,13 +170,6 @@ jobs:
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chmod +x yosys/yosys-config
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chmod +x yosys/yosys-filterlib
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chmod +x yosys/yosys-smtbmc
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- name: "Basic Regression Tests: GCC-8 (Ubuntu 18.04)"
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run: source .github/workflows/basic_reg_test.sh
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- name: "FPGA-Verilog Regression Tests: GCC-8 (Ubuntu 18.04)"
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run: source .github/workflows/fpga_verilog_reg_test.sh
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- name: "FPGA-Bitstream Regression Tests: GCC-8 (Ubuntu 18.04)"
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run: source .github/workflows/fpga_bitstream_reg_test.sh
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- name: "FPGA-SDC Regression Tests: GCC-8 (Ubuntu 18.04)"
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run: source .github/workflows/fpga_sdc_reg_test.sh
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- name: "FPGA-SPICE Regression Tests: GCC-8 (Ubuntu 18.04)"
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run: source .github/workflows/fpga_spice_reg_test.sh
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- name: ${{matrix.config.name}}
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shell: bash
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run: source .github/workflows/${{matrix.config.script}}
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@ -2,4 +2,6 @@ FROM ubuntu:18.04
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ENV DEBIAN_FRONTEND=noninteractive
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RUN apt-get update && apt-get install -y \
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libc6 libffi6 libgcc1 libreadline7 libstdc++6 libtcl8.6 python3 zlib1g libbz2-1.0
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RUN apt-get install -y libdatetime-perl iverilog
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RUN apt-get install -y libdatetime-perl iverilog python3-pip
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ADD requirements.txt requirements.txt
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RUN python3 -m pip install -r requirements.txt
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