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Correct syntax error in autocheck testbench

This commit is contained in:
Aur??Lien ALACCHI 2018-12-08 17:29:56 -07:00
parent 0580d8243f
commit d716b67e23
1 changed files with 4 additions and 4 deletions
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8
vpr7_x2p/vpr/SRC/fpga_spice/verilog/verilog_autocheck_tb.c
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@ -556,17 +556,17 @@ void dump_verilog_top_auto_testbench_ports(FILE* fp,
static
void dump_verilog_top_auto_testbench_call_benchmark(FILE* fp, char* blif_circuit_name){
int iblock, iopad_idx;
fprintf(fp, "// Benchmark instanciation");
fprintf(fp, "// Benchmark instanciation\n");
fprintf(fp, " %s Benchmark(\n", blif_circuit_name);
for (iblock = 0; iblock < num_logical_blocks; iblock++) {
if(iblock>0){
fprintf(fp, ",\n");
}
/* General INOUT*/
if (iopad_verilog_model == logical_block[iblock].mapped_spice_model) {
iopad_idx = logical_block[iblock].mapped_spice_model_index;
/* Make sure We find the correct logical block !*/
assert((VPACK_INPAD == logical_block[iblock].type)||(VPACK_OUTPAD == logical_block[iblock].type));
if(iblock>0){
fprintf(fp, ",\n");
}
if(VPACK_INPAD == logical_block[iblock].type){
fprintf(fp, " %s_%s_%d_", logical_block[iblock].name, gio_inout_prefix, iopad_idx);
}