[core] fixed a bug on the hierarchy writer

This commit is contained in:
tangxifan 2023-09-17 17:42:25 -07:00
parent 3fd60a165d
commit d5152dc16d
3 changed files with 4 additions and 2 deletions

View File

@ -285,7 +285,7 @@ int write_fabric_hierarchy_template(const T& openfpga_ctx, const Command& cmd,
/* Write hierarchy to a file */
return write_fabric_hierarchy_to_text_file(
openfpga_ctx.module_graph(), hie_file_name, size_t(depth),
openfpga_ctx.module_graph(), openfpga_ctx.module_name_map(), hie_file_name, size_t(depth),
cmd_context.option_enable(cmd, opt_verbose));
}

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@ -84,6 +84,7 @@ static int rec_output_module_hierarchy_to_text_file(
* Return 2 if fail when creating files
***************************************************************************************/
int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
const ModuleNameMap& module_name_map,
const std::string& fname,
const size_t& hie_depth_to_stop,
const bool& verbose) {
@ -111,7 +112,7 @@ int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
check_file_stream(fname.c_str(), fp);
/* Find top-level module */
std::string top_module_name = generate_fpga_top_module_name();
std::string top_module_name = module_name_map.name(generate_fpga_top_module_name());
ModuleId top_module = module_manager.find_module(top_module_name);
if (true != module_manager.valid_module_id(top_module)) {
VTR_LOGV_ERROR(verbose, "Unable to find the top-level module '%s'!\n",

View File

@ -15,6 +15,7 @@
namespace openfpga {
int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
const ModuleNameMap& module_name_map,
const std::string& fname,
const size_t& hie_depth_to_stop,
const bool& verbose);