[core] finishing up clock rr_graph appending
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@ -4,6 +4,8 @@
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#include "vtr_assert.h"
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#include "vtr_log.h"
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#include "openfpga_tokenizer.h"
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#include "openfpga_port_parser.h"
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namespace openfpga { // Begin namespace openfpga
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@ -235,6 +237,39 @@ std::vector<std::string> ClockNetwork::spine_taps(const ClockSpineId& spine_id)
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return spine_taps_[spine_id];
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}
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std::vector<std::string> ClockNetwork::spine_flatten_taps(const ClockSpineId& spine_id) const {
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VTR_ASSERT(valid_spine_id(spine_id));
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std::vector<std::string> flatten_taps;
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for (const std::string& tap_name : spine_taps_[spine_id]) {
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StringToken tokenizer(tap_name);
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std::vector<std::string> pin_tokens = tokenizer.split(".");
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if (pin_tokens.size() != 2) {
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VTR_LOG_ERROR("Invalid pin name '%s'. Expect <tile>.<port>\n", pin_name.c_str());
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exit(1);
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}
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PortParser tile_parser(pin_tokens[0]);
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BasicPort tile_info = tile_parser.port();
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PortParser pin_parser(pin_tokens[1]);
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BasicPort pin_info = pin_parser.port();
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if (!tile_info.is_valid()) {
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VTR_LOG_ERROR("Invalid pin name '%s' whose subtile index is not valid\n", pin_name.c_str());
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exit(1);
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}
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if (!pin_info.is_valid()) {
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VTR_LOG_ERROR("Invalid pin name '%s' whose pin index is not valid\n", pin_name.c_str());
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exit(1);
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}
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for (size_t& tile_idx : tile_info.pins()) {
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std::string flatten_tile_str = tile_info.get_name() + "[" + std::to_string(tile_idx) + "]";
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for (size_t& pin_idx : pin_info.pins()) {
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std::string flatten_pin_str = pin_info.get_name() + "[" + std::to_string(pin_idx) + "]";
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flatten_taps.push_back(flatten_tile_str + "." + flatten_pin_str);
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}
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}
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}
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return flatten_taps;
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}
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ClockSpineId ClockNetwork::find_spine(const std::string& name) const {
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auto result = spine_name2id_map_.find(name);
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if (result == spine_name2id_map_.end()) {
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@ -104,7 +104,13 @@ class ClockNetwork {
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vtr::Point<int> spine_switch_point(
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const ClockSpineId& spine_id,
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const ClockSwitchPointId& switch_point_id) const;
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/* Return the original list of tap pins that is in storage; useful for parsers */
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std::vector<std::string> spine_taps(const ClockSpineId& spine_id) const;
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/* Return the list of flatten tap pins. For example: clb[0:1].clk[2:3] is flatten to
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* { clb[0].clk[2], clb[1].clk[2], clb[0].clk[3], clb[1].clk[3] }
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* Useful to build clock routing resource graph
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*/
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std::vector<std::string> spine_flatten_taps(const ClockSpineId& spine_id) const;
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/* Find a spine with a given name, if not found, return an valid id, otherwise
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* return an invalid one */
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ClockSpineId find_spine(const std::string& name) const;
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@ -363,9 +363,12 @@ void try_find_and_add_clock_track2ipin_node(std::vector<RRNodeId>& des_nodes,
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const ClockTreeId& clk_tree,
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const ClockTreePinId& clk_pin) {
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t_physical_tile_type_ptr grid_type = grids[grid_coord.x()][grid_coord.y()].type;
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for (std::string tap_pin_name : clk_ntwk.tap_pin_name(clk_tree, clk_pin)) {
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for (std::string tap_pin_name : clk_ntwk.tap_pin_names(clk_tree, clk_pin)) {
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/* tap pin name could be 'io[5:5].a2f[0]' */
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int grid_pin_idx = find_physical_tile_pin_index(grid_type, tap_pin_name);
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if (grid_pin_idx == grid_type->num_pins) {
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continue;
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}
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RRNodeId des_node = rr_graph_view.node_lookup().find_node(grid_coord.x(), grid_coord.y(), IPIN, grid_pin_idx, pin_side);
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if (rr_graph_view.valid_node(des_node)) {
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des_nodes.push_back(des_node);
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@ -125,7 +125,8 @@ std::set<e_side> find_physical_io_tile_located_sides(
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* which corresponds to the pin 'a2f[1]' of the 5th subtile 'io' in the physical tile
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*******************************************************************/
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int find_physical_tile_pin_index(t_physical_tile_type_ptr physical_tile, std::string pin_name) {
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int pin_idx = -1;
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/* Deposit an invalid value */
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int pin_idx = physical_tile->num_pins;
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/* precheck: return unfound pin if the tile name does not match */
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StringToken tokenizer(pin_name);
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std::vector<std::string> pin_tokens = tokenizer.split(".");
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