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[script] mismatches in vpr options due to upgrade

This commit is contained in:
tangxifan 2022-09-21 09:27:26 -07:00
parent 40edf859e3
commit d0b018ad6e
1 changed files with 1 additions and 1 deletions
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openfpga_flow/openfpga_shell_scripts/fix_pins_example_script.openfpga
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@ -1,6 +1,6 @@
# Run VPR for the 'and' design
#--write_rr_graph example_rr_graph.xml
vpr ${VPR_ARCH_FILE} ${VPR_TESTBENCH_BLIF} --clock_modeling ideal --device ${OPENFPGA_VPR_DEVICE_LAYOUT} --route_chan_width ${OPENFPGA_VPR_ROUTE_CHAN_WIDTH} --fix_pins ${OPENFPGA_VPR_FIX_PINS_FILE} --skip_sync_clustering_and_routing_results on
vpr ${VPR_ARCH_FILE} ${VPR_TESTBENCH_BLIF} --clock_modeling ideal --device ${OPENFPGA_VPR_DEVICE_LAYOUT} --route_chan_width ${OPENFPGA_VPR_ROUTE_CHAN_WIDTH} --fix_clusters ${OPENFPGA_VPR_FIX_PINS_FILE} --skip_sync_clustering_and_routing_results on
# Read OpenFPGA architecture definition
read_openfpga_arch -f ${OPENFPGA_ARCH_FILE}