riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

add circuit model type checking for physical pb_type annotation

This commit is contained in:
tangxifan 2020-01-29 10:41:02 -07:00
parent 8a7a4dc48e
commit cf3c5b5c42
1 changed files with 16 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
openfpga/src/base/annotate_pb_types.cpp
View File

@ -613,6 +613,8 @@ bool link_physical_pb_type_to_circuit_model(t_pb_type* physical_pb_type,
return false; return false;
} }
/* TODO: Ensure that the pb_type ports can be matched in the circuit model ports */
/* Now the circuit model is valid, update the vpr_pb_type_annotation */ /* Now the circuit model is valid, update the vpr_pb_type_annotation */
vpr_pb_type_annotation.add_pb_type_circuit_model(physical_pb_type, circuit_model_id); vpr_pb_type_annotation.add_pb_type_circuit_model(physical_pb_type, circuit_model_id);
return true; return true;
@ -664,6 +666,19 @@ bool link_physical_pb_interconnect_to_circuit_model(t_pb_type* physical_pb_type,
return false; return false;
} }
/* Double check the type of circuit model, it should be the same as required physical type */
e_circuit_model_type required_circuit_model_type = pb_interconnect_require_circuit_model_type(vpr_pb_type_annotation.interconnect_physical_type(pb_interc));
if (circuit_lib.model_type(circuit_model_id) != required_circuit_model_type) {
VTR_LOG_ERROR("Circuit model '%s' type '%s' does not match required type '%s' for interconnect '%s' under physical mode '%s' of pb_type '%s'!\n",
circuit_lib.model_name(circuit_model_id).c_str(),
CIRCUIT_MODEL_TYPE_STRING[circuit_lib.model_type(circuit_model_id)],
CIRCUIT_MODEL_TYPE_STRING[required_circuit_model_type],
pb_interc->name,
physical_mode->name,
physical_pb_type->name);
return false;
}
/* Now the circuit model is valid, update the vpr_pb_type_annotation */ /* Now the circuit model is valid, update the vpr_pb_type_annotation */
vpr_pb_type_annotation.add_interconnect_circuit_model(pb_interc, circuit_model_id); vpr_pb_type_annotation.add_interconnect_circuit_model(pb_interc, circuit_model_id);
@ -977,6 +992,7 @@ void annotate_pb_types(const DeviceContext& vpr_device_ctx,
vpr_pb_type_annotation); vpr_pb_type_annotation);
link_vpr_pb_interconnect_to_circuit_model_implicit_annotation(vpr_device_ctx, openfpga_arch.circuit_lib, link_vpr_pb_interconnect_to_circuit_model_implicit_annotation(vpr_device_ctx, openfpga_arch.circuit_lib,
vpr_pb_type_annotation); vpr_pb_type_annotation);
/* TODO: check the circuit model annotation */
/* Link physical pb_type to mode_bits */ /* Link physical pb_type to mode_bits */