From cb003f88337b62f0e05d08ecc42b00ebd6b1d1a0 Mon Sep 17 00:00:00 2001 From: Lin Date: Fri, 30 Aug 2024 12:51:56 +0800 Subject: [PATCH] mod prelod flag --- openfpga/src/annotation/device_rr_gsb.cpp | 11 ++++++----- openfpga/src/annotation/device_rr_gsb.h | 8 ++++---- openfpga/src/annotation/read_xml_unique_blocks.cpp | 2 +- openfpga/src/annotation/write_xml_unique_blocks.cpp | 4 ++++ openfpga/src/base/openfpga_build_fabric_template.h | 2 +- openfpga/src/base/openfpga_setup_command_template.h | 5 +---- 6 files changed, 17 insertions(+), 15 deletions(-) diff --git a/openfpga/src/annotation/device_rr_gsb.cpp b/openfpga/src/annotation/device_rr_gsb.cpp index 732df18bc..a37921e7c 100644 --- a/openfpga/src/annotation/device_rr_gsb.cpp +++ b/openfpga/src/annotation/device_rr_gsb.cpp @@ -66,9 +66,9 @@ size_t DeviceRRGSB::get_num_cb_unique_module(const t_rr_type& cb_type) const { } } -void DeviceRRGSB::init_preload_flag() { preload_ = false; } -void DeviceRRGSB::set_preload_flag(const bool flag) { preload_ = flag; } -bool DeviceRRGSB::get_preload_flag() const { return preload_; } +void DeviceRRGSB::init_is_dirty_flag() { is_dirty_ = false; } +void DeviceRRGSB::set_is_dirty_flag(const bool flag) { is_dirty_ = flag; } +bool DeviceRRGSB::get_is_dirty_flag() const { return is_dirty_; } /* Identify if a GSB actually exists at a location */ bool DeviceRRGSB::is_gsb_exist(const RRGraphView& rr_graph, const vtr::Point coord) const { @@ -363,6 +363,7 @@ void DeviceRRGSB::build_unique_module(const RRGraphView& rr_graph) { build_cb_unique_module(rr_graph, CHANY); build_gsb_unique_module(); + set_is_dirty_flag(true); } void DeviceRRGSB::add_gsb_unique_module(const vtr::Point& coordinate) { @@ -423,7 +424,7 @@ void DeviceRRGSB::clear() { clear_sb_unique_module(); clear_sb_unique_module_id(); - init_preload_flag(); + init_is_dirty_flag(); } void DeviceRRGSB::clear_unique_modules() { @@ -436,7 +437,7 @@ void DeviceRRGSB::clear_unique_modules() { clear_sb_unique_module(); clear_sb_unique_module_id(); - init_preload_flag(); + init_is_dirty_flag(); } void DeviceRRGSB::clear_gsb() { diff --git a/openfpga/src/annotation/device_rr_gsb.h b/openfpga/src/annotation/device_rr_gsb.h index 8b631107c..43627fb9e 100644 --- a/openfpga/src/annotation/device_rr_gsb.h +++ b/openfpga/src/annotation/device_rr_gsb.h @@ -69,8 +69,8 @@ class DeviceRRGSB { const vtr::Point& coordinate) const; public: /* Mutators */ - void set_preload_flag(const bool flag); - bool get_preload_flag() const; + void set_is_dirty_flag(const bool flag); + bool get_is_dirty_flag() const; void build_gsb_unique_module(); /* Add a switch block to the array, which will automatically identify and update the lists of unique mirrors and rotatable mirrors */ @@ -126,7 +126,7 @@ class DeviceRRGSB { private: /* Internal cleaners */ void clear_gsb(); /* clean the content */ void clear_cb_unique_module(const t_rr_type& cb_type); /* clean the content */ - void init_preload_flag(); + void init_is_dirty_flag(); void clear_cb_unique_module_id( const t_rr_type& cb_type); /* clean the content */ void clear_sb_unique_module(); /* clean the content */ @@ -165,7 +165,7 @@ class DeviceRRGSB { private: /* Internal Data */ std::vector> rr_gsb_; - bool preload_; // is_valid + bool is_dirty_ = false; // is_valid std::vector> gsb_unique_module_id_; /* A map from rr_gsb to its unique mirror */ diff --git a/openfpga/src/annotation/read_xml_unique_blocks.cpp b/openfpga/src/annotation/read_xml_unique_blocks.cpp index 0e59a9a4b..9cb932c3e 100644 --- a/openfpga/src/annotation/read_xml_unique_blocks.cpp +++ b/openfpga/src/annotation/read_xml_unique_blocks.cpp @@ -155,7 +155,7 @@ int read_xml_unique_blocks(DeviceRRGSB& device_rr_gsb, const char* file_name, /* As preloading gsb hasn't been developed, we should build gsb using the * preloaded cbs and sbs*/ device_rr_gsb.build_gsb_unique_module(); - device_rr_gsb.set_preload_flag(true); + device_rr_gsb.set_is_dirty_flag(true); if (verbose_output) { report_unique_module_status_read(device_rr_gsb, true); } diff --git a/openfpga/src/annotation/write_xml_unique_blocks.cpp b/openfpga/src/annotation/write_xml_unique_blocks.cpp index 563755526..c664d6760 100644 --- a/openfpga/src/annotation/write_xml_unique_blocks.cpp +++ b/openfpga/src/annotation/write_xml_unique_blocks.cpp @@ -123,6 +123,10 @@ void report_unique_module_status_write(const DeviceRRGSB& device_rr_gsb, int write_xml_unique_blocks(const DeviceRRGSB& device_rr_gsb, const char* fname, bool verbose_output) { vtr::ScopedStartFinishTimer timer("Write unique blocks..."); + if (device_rr_gsb.get_is_dirty_flag() == false) { + VTR_LOG_ERROR("unique_blocks are empty!"); + return CMD_EXEC_FATAL_ERROR; + } /* Create a file handler */ std::fstream fp; /* Open the file stream */ diff --git a/openfpga/src/base/openfpga_build_fabric_template.h b/openfpga/src/base/openfpga_build_fabric_template.h index 9e94c9f2e..283171984 100644 --- a/openfpga/src/base/openfpga_build_fabric_template.h +++ b/openfpga/src/base/openfpga_build_fabric_template.h @@ -145,7 +145,7 @@ int build_fabric_template(T& openfpga_ctx, const Command& cmd, } if (true == cmd_context.option_enable(cmd, opt_compress_routing) && - false == openfpga_ctx.device_rr_gsb().get_preload_flag()) { + false == openfpga_ctx.device_rr_gsb().get_is_dirty_flag()) { compress_routing_hierarchy_template( openfpga_ctx, cmd_context.option_enable(cmd, opt_verbose)); /* Update flow manager to enable compress routing */ diff --git a/openfpga/src/base/openfpga_setup_command_template.h b/openfpga/src/base/openfpga_setup_command_template.h index f13c62700..7ebaad845 100644 --- a/openfpga/src/base/openfpga_setup_command_template.h +++ b/openfpga/src/base/openfpga_setup_command_template.h @@ -1273,11 +1273,8 @@ void add_setup_command_templates(openfpga::Shell& shell, /******************************** * Command 'write_unique_blocks' */ - std::vector cmd_dependency_write_unique_blocks_command; - cmd_dependency_write_unique_blocks_command.push_back(build_fabric_cmd_id); add_write_unique_blocks_command_template( - shell, openfpga_setup_cmd_class, cmd_dependency_write_unique_blocks_command, - hidden); + shell, openfpga_setup_cmd_class, std::vector(), hidden); } } /* end namespace openfpga */