diff --git a/openfpga_flow/tasks/basic_tests/constrain_pin_location/config/fpga_io_map.xml b/openfpga_flow/tasks/basic_tests/constrain_pin_location/config/fpga_io_map.xml
index 1bdbfb4ac..26a7fd83b 100644
--- a/openfpga_flow/tasks/basic_tests/constrain_pin_location/config/fpga_io_map.xml
+++ b/openfpga_flow/tasks/basic_tests/constrain_pin_location/config/fpga_io_map.xml
@@ -1,18 +1,136 @@
+<!--
+	- FPGA Fabric I/O Information
+	- Generated by OpenFPGA
+	- Date: Thu Jul 28 11:57:11 2022
+-->
+
 <io_coordinates>
-  <io pad="gfpga_pad_IO_A2F[0]" x="1" y="2" z="0"/>
-  <io pad="gfpga_pad_IO_F2A[0]" x="1" y="2" z="1"/>
-  <io pad="gfpga_pad_IO_A2F[1]" x="1" y="2" z="2"/>
-  <io pad="gfpga_pad_IO_F2A[1]" x="1" y="2" z="3"/>
-  <io pad="gfpga_pad_IO_A2F[2]" x="1" y="2" z="4"/>
-  <io pad="gfpga_pad_IO_F2A[2]" x="1" y="2" z="5"/>
-  <io pad="gfpga_pad_IO_A2F[3]" x="1" y="2" z="6"/>
-  <io pad="gfpga_pad_IO_F2A[3]" x="1" y="2" z="7"/>
-  <io pad="gfpga_pad_IO_A2F[4]" x="2" y="1" z="0"/>
-  <io pad="gfpga_pad_IO_F2A[4]" x="2" y="1" z="1"/>
-  <io pad="gfpga_pad_IO_A2F[5]" x="2" y="1" z="2"/>
-  <io pad="gfpga_pad_IO_F2A[5]" x="2" y="1" z="3"/>
-  <io pad="gfpga_pad_IO_A2F[6]" x="2" y="1" z="4"/>
-  <io pad="gfpga_pad_IO_F2A[6]" x="2" y="1" z="5"/>
-  <io pad="gfpga_pad_IO_A2F[7]" x="2" y="1" z="6"/>
-  <io pad="gfpga_pad_IO_F2A[7]" x="2" y="1" z="7"/>
+	<io pad="gfpga_pad_GPIO_PAD[96]" x="0" y="1" z="0"/>
+	<io pad="gfpga_pad_GPIO_PAD[97]" x="0" y="1" z="1"/>
+	<io pad="gfpga_pad_GPIO_PAD[98]" x="0" y="1" z="2"/>
+	<io pad="gfpga_pad_GPIO_PAD[99]" x="0" y="1" z="3"/>
+	<io pad="gfpga_pad_GPIO_PAD[100]" x="0" y="1" z="4"/>
+	<io pad="gfpga_pad_GPIO_PAD[101]" x="0" y="1" z="5"/>
+	<io pad="gfpga_pad_GPIO_PAD[102]" x="0" y="1" z="6"/>
+	<io pad="gfpga_pad_GPIO_PAD[103]" x="0" y="1" z="7"/>
+	<io pad="gfpga_pad_GPIO_PAD[104]" x="0" y="2" z="0"/>
+	<io pad="gfpga_pad_GPIO_PAD[105]" x="0" y="2" z="1"/>
+	<io pad="gfpga_pad_GPIO_PAD[106]" x="0" y="2" z="2"/>
+	<io pad="gfpga_pad_GPIO_PAD[107]" x="0" y="2" z="3"/>
+	<io pad="gfpga_pad_GPIO_PAD[108]" x="0" y="2" z="4"/>
+	<io pad="gfpga_pad_GPIO_PAD[109]" x="0" y="2" z="5"/>
+	<io pad="gfpga_pad_GPIO_PAD[110]" x="0" y="2" z="6"/>
+	<io pad="gfpga_pad_GPIO_PAD[111]" x="0" y="2" z="7"/>
+	<io pad="gfpga_pad_GPIO_PAD[112]" x="0" y="3" z="0"/>
+	<io pad="gfpga_pad_GPIO_PAD[113]" x="0" y="3" z="1"/>
+	<io pad="gfpga_pad_GPIO_PAD[114]" x="0" y="3" z="2"/>
+	<io pad="gfpga_pad_GPIO_PAD[115]" x="0" y="3" z="3"/>
+	<io pad="gfpga_pad_GPIO_PAD[116]" x="0" y="3" z="4"/>
+	<io pad="gfpga_pad_GPIO_PAD[117]" x="0" y="3" z="5"/>
+	<io pad="gfpga_pad_GPIO_PAD[118]" x="0" y="3" z="6"/>
+	<io pad="gfpga_pad_GPIO_PAD[119]" x="0" y="3" z="7"/>
+	<io pad="gfpga_pad_GPIO_PAD[120]" x="0" y="4" z="0"/>
+	<io pad="gfpga_pad_GPIO_PAD[121]" x="0" y="4" z="1"/>
+	<io pad="gfpga_pad_GPIO_PAD[122]" x="0" y="4" z="2"/>
+	<io pad="gfpga_pad_GPIO_PAD[123]" x="0" y="4" z="3"/>
+	<io pad="gfpga_pad_GPIO_PAD[124]" x="0" y="4" z="4"/>
+	<io pad="gfpga_pad_GPIO_PAD[125]" x="0" y="4" z="5"/>
+	<io pad="gfpga_pad_GPIO_PAD[126]" x="0" y="4" z="6"/>
+	<io pad="gfpga_pad_GPIO_PAD[127]" x="0" y="4" z="7"/>
+	<io pad="gfpga_pad_GPIO_PAD[88]" x="1" y="0" z="0"/>
+	<io pad="gfpga_pad_GPIO_PAD[89]" x="1" y="0" z="1"/>
+	<io pad="gfpga_pad_GPIO_PAD[90]" x="1" y="0" z="2"/>
+	<io pad="gfpga_pad_GPIO_PAD[91]" x="1" y="0" z="3"/>
+	<io pad="gfpga_pad_GPIO_PAD[92]" x="1" y="0" z="4"/>
+	<io pad="gfpga_pad_GPIO_PAD[93]" x="1" y="0" z="5"/>
+	<io pad="gfpga_pad_GPIO_PAD[94]" x="1" y="0" z="6"/>
+	<io pad="gfpga_pad_GPIO_PAD[95]" x="1" y="0" z="7"/>
+	<io pad="gfpga_pad_GPIO_PAD[0]" x="1" y="5" z="0"/>
+	<io pad="gfpga_pad_GPIO_PAD[1]" x="1" y="5" z="1"/>
+	<io pad="gfpga_pad_GPIO_PAD[2]" x="1" y="5" z="2"/>
+	<io pad="gfpga_pad_GPIO_PAD[3]" x="1" y="5" z="3"/>
+	<io pad="gfpga_pad_GPIO_PAD[4]" x="1" y="5" z="4"/>
+	<io pad="gfpga_pad_GPIO_PAD[5]" x="1" y="5" z="5"/>
+	<io pad="gfpga_pad_GPIO_PAD[6]" x="1" y="5" z="6"/>
+	<io pad="gfpga_pad_GPIO_PAD[7]" x="1" y="5" z="7"/>
+	<io pad="gfpga_pad_GPIO_PAD[80]" x="2" y="0" z="0"/>
+	<io pad="gfpga_pad_GPIO_PAD[81]" x="2" y="0" z="1"/>
+	<io pad="gfpga_pad_GPIO_PAD[82]" x="2" y="0" z="2"/>
+	<io pad="gfpga_pad_GPIO_PAD[83]" x="2" y="0" z="3"/>
+	<io pad="gfpga_pad_GPIO_PAD[84]" x="2" y="0" z="4"/>
+	<io pad="gfpga_pad_GPIO_PAD[85]" x="2" y="0" z="5"/>
+	<io pad="gfpga_pad_GPIO_PAD[86]" x="2" y="0" z="6"/>
+	<io pad="gfpga_pad_GPIO_PAD[87]" x="2" y="0" z="7"/>
+	<io pad="gfpga_pad_GPIO_PAD[8]" x="2" y="5" z="0"/>
+	<io pad="gfpga_pad_GPIO_PAD[9]" x="2" y="5" z="1"/>
+	<io pad="gfpga_pad_GPIO_PAD[10]" x="2" y="5" z="2"/>
+	<io pad="gfpga_pad_GPIO_PAD[11]" x="2" y="5" z="3"/>
+	<io pad="gfpga_pad_GPIO_PAD[12]" x="2" y="5" z="4"/>
+	<io pad="gfpga_pad_GPIO_PAD[13]" x="2" y="5" z="5"/>
+	<io pad="gfpga_pad_GPIO_PAD[14]" x="2" y="5" z="6"/>
+	<io pad="gfpga_pad_GPIO_PAD[15]" x="2" y="5" z="7"/>
+	<io pad="gfpga_pad_GPIO_PAD[72]" x="3" y="0" z="0"/>
+	<io pad="gfpga_pad_GPIO_PAD[73]" x="3" y="0" z="1"/>
+	<io pad="gfpga_pad_GPIO_PAD[74]" x="3" y="0" z="2"/>
+	<io pad="gfpga_pad_GPIO_PAD[75]" x="3" y="0" z="3"/>
+	<io pad="gfpga_pad_GPIO_PAD[76]" x="3" y="0" z="4"/>
+	<io pad="gfpga_pad_GPIO_PAD[77]" x="3" y="0" z="5"/>
+	<io pad="gfpga_pad_GPIO_PAD[78]" x="3" y="0" z="6"/>
+	<io pad="gfpga_pad_GPIO_PAD[79]" x="3" y="0" z="7"/>
+	<io pad="gfpga_pad_GPIO_PAD[16]" x="3" y="5" z="0"/>
+	<io pad="gfpga_pad_GPIO_PAD[17]" x="3" y="5" z="1"/>
+	<io pad="gfpga_pad_GPIO_PAD[18]" x="3" y="5" z="2"/>
+	<io pad="gfpga_pad_GPIO_PAD[19]" x="3" y="5" z="3"/>
+	<io pad="gfpga_pad_GPIO_PAD[20]" x="3" y="5" z="4"/>
+	<io pad="gfpga_pad_GPIO_PAD[21]" x="3" y="5" z="5"/>
+	<io pad="gfpga_pad_GPIO_PAD[22]" x="3" y="5" z="6"/>
+	<io pad="gfpga_pad_GPIO_PAD[23]" x="3" y="5" z="7"/>
+	<io pad="gfpga_pad_GPIO_PAD[64]" x="4" y="0" z="0"/>
+	<io pad="gfpga_pad_GPIO_PAD[65]" x="4" y="0" z="1"/>
+	<io pad="gfpga_pad_GPIO_PAD[66]" x="4" y="0" z="2"/>
+	<io pad="gfpga_pad_GPIO_PAD[67]" x="4" y="0" z="3"/>
+	<io pad="gfpga_pad_GPIO_PAD[68]" x="4" y="0" z="4"/>
+	<io pad="gfpga_pad_GPIO_PAD[69]" x="4" y="0" z="5"/>
+	<io pad="gfpga_pad_GPIO_PAD[70]" x="4" y="0" z="6"/>
+	<io pad="gfpga_pad_GPIO_PAD[71]" x="4" y="0" z="7"/>
+	<io pad="gfpga_pad_GPIO_PAD[24]" x="4" y="5" z="0"/>
+	<io pad="gfpga_pad_GPIO_PAD[25]" x="4" y="5" z="1"/>
+	<io pad="gfpga_pad_GPIO_PAD[26]" x="4" y="5" z="2"/>
+	<io pad="gfpga_pad_GPIO_PAD[27]" x="4" y="5" z="3"/>
+	<io pad="gfpga_pad_GPIO_PAD[28]" x="4" y="5" z="4"/>
+	<io pad="gfpga_pad_GPIO_PAD[29]" x="4" y="5" z="5"/>
+	<io pad="gfpga_pad_GPIO_PAD[30]" x="4" y="5" z="6"/>
+	<io pad="gfpga_pad_GPIO_PAD[31]" x="4" y="5" z="7"/>
+	<io pad="gfpga_pad_GPIO_PAD[56]" x="5" y="1" z="0"/>
+	<io pad="gfpga_pad_GPIO_PAD[57]" x="5" y="1" z="1"/>
+	<io pad="gfpga_pad_GPIO_PAD[58]" x="5" y="1" z="2"/>
+	<io pad="gfpga_pad_GPIO_PAD[59]" x="5" y="1" z="3"/>
+	<io pad="gfpga_pad_GPIO_PAD[60]" x="5" y="1" z="4"/>
+	<io pad="gfpga_pad_GPIO_PAD[61]" x="5" y="1" z="5"/>
+	<io pad="gfpga_pad_GPIO_PAD[62]" x="5" y="1" z="6"/>
+	<io pad="gfpga_pad_GPIO_PAD[63]" x="5" y="1" z="7"/>
+	<io pad="gfpga_pad_GPIO_PAD[48]" x="5" y="2" z="0"/>
+	<io pad="gfpga_pad_GPIO_PAD[49]" x="5" y="2" z="1"/>
+	<io pad="gfpga_pad_GPIO_PAD[50]" x="5" y="2" z="2"/>
+	<io pad="gfpga_pad_GPIO_PAD[51]" x="5" y="2" z="3"/>
+	<io pad="gfpga_pad_GPIO_PAD[52]" x="5" y="2" z="4"/>
+	<io pad="gfpga_pad_GPIO_PAD[53]" x="5" y="2" z="5"/>
+	<io pad="gfpga_pad_GPIO_PAD[54]" x="5" y="2" z="6"/>
+	<io pad="gfpga_pad_GPIO_PAD[55]" x="5" y="2" z="7"/>
+	<io pad="gfpga_pad_GPIO_PAD[40]" x="5" y="3" z="0"/>
+	<io pad="gfpga_pad_GPIO_PAD[41]" x="5" y="3" z="1"/>
+	<io pad="gfpga_pad_GPIO_PAD[42]" x="5" y="3" z="2"/>
+	<io pad="gfpga_pad_GPIO_PAD[43]" x="5" y="3" z="3"/>
+	<io pad="gfpga_pad_GPIO_PAD[44]" x="5" y="3" z="4"/>
+	<io pad="gfpga_pad_GPIO_PAD[45]" x="5" y="3" z="5"/>
+	<io pad="gfpga_pad_GPIO_PAD[46]" x="5" y="3" z="6"/>
+	<io pad="gfpga_pad_GPIO_PAD[47]" x="5" y="3" z="7"/>
+	<io pad="gfpga_pad_GPIO_PAD[32]" x="5" y="4" z="0"/>
+	<io pad="gfpga_pad_GPIO_PAD[33]" x="5" y="4" z="1"/>
+	<io pad="gfpga_pad_GPIO_PAD[34]" x="5" y="4" z="2"/>
+	<io pad="gfpga_pad_GPIO_PAD[35]" x="5" y="4" z="3"/>
+	<io pad="gfpga_pad_GPIO_PAD[36]" x="5" y="4" z="4"/>
+	<io pad="gfpga_pad_GPIO_PAD[37]" x="5" y="4" z="5"/>
+	<io pad="gfpga_pad_GPIO_PAD[38]" x="5" y="4" z="6"/>
+	<io pad="gfpga_pad_GPIO_PAD[39]" x="5" y="4" z="7"/>
 </io_coordinates>