skip sdio
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c89247d465
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@ -55,7 +55,7 @@ bench20=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/adder_64
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#bench21=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/clock_tree_design/*.v
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bench22=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/io_max/*.v
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bench23=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/io_reg_max/*.v
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bench24=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/sdio_client_top/*.v
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#bench24=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/sdio_client_top/*.v
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bench25=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/shift_reg_8192/*.v
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bench26=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/top_120_13/*.v
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@ -92,7 +92,7 @@ bench20_top = adder_64
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#bench21_top = clock_tree_design
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bench22_top = io_max
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bench23_top = io_reg_max
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bench24_top = sdio_client_top
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#bench24_top = sdio_client_top
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bench25_top = shift_reg_8192
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bench26_top = top_120_13
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