From edfe3144c3417b848fbd19157d474616814bbfc0 Mon Sep 17 00:00:00 2001 From: tangxifan Date: Tue, 9 Jul 2019 20:28:01 -0600 Subject: [PATCH 1/2] update profiling, found where runtime is lost --- .../vpr/SRC/fpga_x2p/base/fpga_x2p_unique_routing.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_unique_routing.c b/vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_unique_routing.c index 315f4f5ff..d625a5375 100644 --- a/vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_unique_routing.c +++ b/vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_unique_routing.c @@ -1324,6 +1324,10 @@ DeviceRRGSB build_device_rr_gsb(boolean output_sb_xml, char* sb_xml_dir, clock_t t_end; float run_time_sec; + clock_t t_start_profiling; + clock_t t_end_profiling; + float run_time_sec_profiling = 0.; + /* Start time count */ t_start = clock(); @@ -1342,8 +1346,15 @@ DeviceRRGSB build_device_rr_gsb(boolean output_sb_xml, char* sb_xml_dir, LL_num_rr_nodes, LL_rr_node, LL_rr_node_indices, num_segments, LL_rr_indexed_data); + + /* For profiling */ + t_start_profiling = clock(); /* sort drive_rr_nodes */ sort_rr_gsb_drive_rr_nodes(rr_gsb); + /* End time count */ + t_end_profiling = clock(); + run_time_sec_profiling += (float)(t_end_profiling - t_start_profiling) / CLOCKS_PER_SEC; + /* Add to device_rr_gsb */ DeviceCoordinator sb_coordinator = rr_gsb.get_sb_coordinator(); LL_device_rr_gsb.add_rr_gsb(sb_coordinator, rr_gsb); @@ -1360,6 +1371,8 @@ DeviceRRGSB build_device_rr_gsb(boolean output_sb_xml, char* sb_xml_dir, run_time_sec = (float)(t_end - t_start) / CLOCKS_PER_SEC; vpr_printf(TIO_MESSAGE_INFO, "Backannotation of Switch Block took %g seconds\n\n", run_time_sec); + vpr_printf(TIO_MESSAGE_INFO, "Edge sorting for Switch Block took %g seconds\n\n", run_time_sec_profiling); + if (TRUE == output_sb_xml) { create_dir_path(sb_xml_dir); From 57ae5dbbec48eecc277525b296eb8a5d6c1533fe Mon Sep 17 00:00:00 2001 From: tangxifan Date: Tue, 9 Jul 2019 20:47:52 -0600 Subject: [PATCH 2/2] bug fixing for rectangle FPGA sizes --- vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_compact_netlist.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_compact_netlist.c b/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_compact_netlist.c index 064cb2623..8ea7f0f6b 100644 --- a/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_compact_netlist.c +++ b/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_compact_netlist.c @@ -986,7 +986,7 @@ void dump_compact_verilog_defined_connection_boxes(t_sram_orgz_info* cur_sram_or /* Get X-channel CB coordinator */ const DeviceCoordinator cbx_coordinator = rr_gsb.get_cb_coordinator(CHANX); /* X - channels [1...nx][0..ny]*/ - if ((TRUE == is_cb_exist(CHANX, cbx_coordinator.get_x(), cbx_coordinator.get_x())) + if ((TRUE == is_cb_exist(CHANX, cbx_coordinator.get_x(), cbx_coordinator.get_y())) &&(true == rr_gsb.is_cb_exist(CHANX))) { dump_compact_verilog_defined_one_connection_box(cur_sram_orgz_info, fp, rr_gsb, CHANX); } @@ -994,7 +994,7 @@ void dump_compact_verilog_defined_connection_boxes(t_sram_orgz_info* cur_sram_or /* Get X-channel CB coordinator */ const DeviceCoordinator cby_coordinator = rr_gsb.get_cb_coordinator(CHANY); /* Y - channels [1...ny][0..nx]*/ - if ((TRUE == is_cb_exist(CHANY, cby_coordinator.get_x(), cby_coordinator.get_x())) + if ((TRUE == is_cb_exist(CHANY, cby_coordinator.get_x(), cby_coordinator.get_y())) &&(true == rr_gsb.is_cb_exist(CHANY))) { dump_compact_verilog_defined_one_connection_box(cur_sram_orgz_info, fp, rr_gsb, CHANY); }