[core] debugging

2023-03-02 21:54:48 -08:00 · 2023-03-02 21:54:48 -08:00 · c4ad21451c
parent fd1c4039d3
commit c4ad21451c
1 changed files with 1 additions and 1 deletions
--- a/openfpga/src/annotation/append_clock_rr_graph.cpp
+++ b/openfpga/src/annotation/append_clock_rr_graph.cpp
@ -565,7 +565,7 @@ int append_clock_rr_graph(DeviceContext& vpr_device_ctx,
    "Appending programmable clock network to routing resource graph");

  /* Skip if there is no clock tree */
-  if (clk_ntwk.num_trees()) {
+  if (clk_ntwk.num_trees() == 0) {
    VTR_LOG(
      "Skip due to 0 clock trees.\nDouble check your clock architecture "
      "definition if this is unexpected\n");