From bf841b9a8e2b4711685709d251943a1b235db87d Mon Sep 17 00:00:00 2001 From: tangxifan Date: Wed, 22 Apr 2020 17:28:16 -0600 Subject: [PATCH] bug fixed in identifying wired LUT --- openfpga/src/utils/physical_pb_utils.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/openfpga/src/utils/physical_pb_utils.cpp b/openfpga/src/utils/physical_pb_utils.cpp index cd1b13a4b..129784575 100644 --- a/openfpga/src/utils/physical_pb_utils.cpp +++ b/openfpga/src/utils/physical_pb_utils.cpp @@ -324,6 +324,12 @@ void rec_update_physical_pb_from_operating_pb(PhysicalPb& phy_pb, /* The following code is inspired by output_cluster.cpp */ bool is_used = false; t_pb_type* child_pb_type = &(mapped_mode->pb_type_children[ipb]); + + /* Bypass non-primitive pb_type, we care only the LUT pb_type */ + if (false == is_primitive_pb_type(child_pb_type)) { + continue; + } + int port_index = 0; t_pb_graph_node* child_pb_graph_node = &(pb_graph_node->child_pb_graph_nodes[op_pb->mode][ipb][jpb]);