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[core] fixed bugs on supporting heterogeneous blocks in tile modules

This commit is contained in:
tangxifan 2023-07-27 20:29:18 -07:00
parent 3d56bd0ff2
commit beaa687a20
5 changed files with 66 additions and 9 deletions
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54
openfpga/src/annotation/fabric_tile.cpp
View File

@ -4,6 +4,7 @@
#include "fabric_tile.h"
#include "build_top_module_utils.h"
#include "command_exit_codes.h"
#include "vtr_assert.h"
#include "vtr_log.h"
@ -31,7 +32,12 @@ FabricTileId FabricTile::find_unique_tile(const FabricTileId& tile_id) const {
std::vector<vtr::Point<size_t>> FabricTile::pb_coordinates(
const FabricTileId& tile_id) const {
VTR_ASSERT(valid_tile_id(tile_id));
return pb_coords_[tile_id];
std::vector<vtr::Point<size_t>> pb_root_coords;
pb_root_coords.reserve(pb_coords_[tile_id].size());
for (auto curr_rect : pb_coords_[tile_id]) {
pb_root_coords.push_back(curr_rect.bottom_left());
}
return pb_root_coords;
}
std::vector<vtr::Point<size_t>> FabricTile::cb_coordinates(
@ -211,8 +217,7 @@ size_t FabricTile::find_pb_index_in_tile(const FabricTileId& tile_id,
return pb_gsb_coords_[tile_id].size();
} else {
for (size_t idx = 0; idx < pb_coords_[tile_id].size(); ++idx) {
vtr::Point<size_t> curr_coord = pb_coords_[tile_id][idx];
if (curr_coord == coord) {
if (pb_coords_[tile_id][idx].coincident(coord)) {
return idx;
}
}
@ -521,12 +526,49 @@ int FabricTile::add_pb_coordinate(const FabricTileId& tile_id,
const vtr::Point<size_t>& coord,
const vtr::Point<size_t>& gsb_coord) {
VTR_ASSERT(valid_tile_id(tile_id));
pb_coords_[tile_id].push_back(coord);
pb_coords_[tile_id].push_back(vtr::Rect<size_t>(coord, coord));
pb_gsb_coords_[tile_id].push_back(gsb_coord);
/* Register in fast look-up */
return register_pb_in_lookup(tile_id, coord);
}
int FabricTile::set_pb_max_coordinate(const FabricTileId& tile_id,
const size_t& pb_index,
const vtr::Point<size_t>& max_coord) {
VTR_ASSERT(valid_tile_id(tile_id));
if (pb_index >= pb_coords_[tile_id].size()) {
VTR_LOG_ERROR(
"Invalid pb_index '%lu' is out of range of programmable block list "
"(size='%lu') of tile[%lu][%lu]!\n",
pb_index, pb_coords_[tile_id].size(), tile_coordinate(tile_id).x(),
tile_coordinate(tile_id).y());
return CMD_EXEC_FATAL_ERROR;
}
if (max_coord.x() < pb_coords_[tile_id][pb_index].xmin() ||
max_coord.y() < pb_coords_[tile_id][pb_index].ymin()) {
VTR_LOG_ERROR(
"Invalid max. coordinate (%lu, %lu) is out of range of programmable "
"block list (%lu, %lu) <-> (%lu, %lu) of tile[%lu][%lu]!\n",
max_coord.x(), max_coord.y(), pb_coords_[tile_id][pb_index].xmin(),
pb_coords_[tile_id][pb_index].ymin(),
pb_coords_[tile_id][pb_index].xmax(),
pb_coords_[tile_id][pb_index].ymax(), tile_coordinate(tile_id).x(),
tile_coordinate(tile_id).y());
return CMD_EXEC_FATAL_ERROR;
}
pb_coords_[tile_id][pb_index].set_xmax(max_coord.x());
pb_coords_[tile_id][pb_index].set_ymax(max_coord.y());
/* Update fast lookup */
for (size_t ix = pb_coords_[tile_id][pb_index].xmin();
ix <= pb_coords_[tile_id][pb_index].xmax(); ++ix) {
for (size_t iy = pb_coords_[tile_id][pb_index].ymin();
iy <= pb_coords_[tile_id][pb_index].ymax(); ++iy) {
register_pb_in_lookup(tile_id, vtr::Point<size_t>(ix, iy));
}
}
return CMD_EXEC_SUCCESS;
}
int FabricTile::add_cb_coordinate(const FabricTileId& tile_id,
const t_rr_type& cb_type,
const vtr::Point<size_t>& coord) {
@ -589,8 +631,8 @@ bool FabricTile::equivalent_tile(const FabricTileId& tile_a,
}
/* The pb of two tiles should be the same, otherwise not equivalent */
for (size_t iblk = 0; iblk < pb_coords_[tile_a].size(); ++iblk) {
vtr::Point<size_t> tile_a_pb_coord = pb_coords_[tile_a][iblk];
vtr::Point<size_t> tile_b_pb_coord = pb_coords_[tile_b][iblk];
vtr::Point<size_t> tile_a_pb_coord = pb_coords_[tile_a][iblk].bottom_left();
vtr::Point<size_t> tile_b_pb_coord = pb_coords_[tile_b][iblk].bottom_left();
if (generate_grid_block_module_name_in_top_module(std::string(), grids,
tile_a_pb_coord) !=
generate_grid_block_module_name_in_top_module(std::string(), grids,

8
openfpga/src/annotation/fabric_tile.h
View File

@ -25,6 +25,8 @@ namespace openfpga {
class FabricTile {
public: /* Accessors */
vtr::Point<size_t> tile_coordinate(const FabricTileId& tile_id) const;
/* Return all the root (bottom-left point) coordinates of programmable blocks
* under a given tile. */
std::vector<vtr::Point<size_t>> pb_coordinates(
const FabricTileId& tile_id) const;
std::vector<vtr::Point<size_t>> cb_coordinates(
@ -115,6 +117,10 @@ class FabricTile {
int add_pb_coordinate(const FabricTileId& tile_id,
const vtr::Point<size_t>& coord,
const vtr::Point<size_t>& gsb_coord);
/* Set the top-right coordinate of a pb. This is mainly for heterogeneous
* blocks, whose height or width can be > 1 */
int set_pb_max_coordinate(const FabricTileId& tile_id, const size_t& pb_index,
const vtr::Point<size_t>& max_coord);
int add_cb_coordinate(const FabricTileId& tile_id, const t_rr_type& cb_type,
const vtr::Point<size_t>& coord);
int add_sb_coordinate(const FabricTileId& tile_id,
@ -168,7 +174,7 @@ class FabricTile {
* organization (to follow bottom-left corner style). This limitation can be
* resolved.
*/
vtr::vector<FabricTileId, std::vector<vtr::Point<size_t>>> pb_coords_;
vtr::vector<FabricTileId, std::vector<vtr::Rect<size_t>>> pb_coords_;
vtr::vector<FabricTileId, std::vector<vtr::Point<size_t>>> pb_gsb_coords_;
vtr::vector<FabricTileId, std::vector<vtr::Point<size_t>>> cbx_coords_;
vtr::vector<FabricTileId, std::vector<vtr::Point<size_t>>> cby_coords_;

8
openfpga/src/fabric/build_fabric_tile.cpp
View File

@ -72,6 +72,14 @@ static int build_fabric_tile_style_top_left(FabricTile& fabric_tile,
curr_tile_coord.x(), curr_tile_coord.y(), root_tile_coord.x(),
root_tile_coord.y());
curr_tile_id = fabric_tile.find_tile(root_tile_coord);
/* Update the coordinates of the pb in tiles */
size_t root_pb_idx_in_curr_tile =
fabric_tile.find_pb_index_in_tile(curr_tile_id, root_tile_coord);
status_code = fabric_tile.set_pb_max_coordinate(
curr_tile_id, root_pb_idx_in_curr_tile, vtr::Point<size_t>(ix, iy));
if (status_code != CMD_EXEC_SUCCESS) {
return CMD_EXEC_FATAL_ERROR;
}
} else {
/* Need to create a new tile here */
VTR_LOGV(verbose, "Create a regular tile[%lu][%lu]\n",

3
openfpga/src/fabric/build_tile_modules.cpp
View File

@ -1120,7 +1120,8 @@ static int build_tile_port_and_nets_from_pb(
size_t num_fanout_in_tile =
module_manager.module_net_sinks(tile_module, curr_net).size();
RRNodeId rr_node = rr_graph.node_lookup().find_node(
pb_coord.x(), pb_coord.y(), OPIN, ipin, side);
pb_coord.x() + iwidth, pb_coord.y() + iheight, OPIN, ipin,
side);
size_t num_fanout_required =
rr_graph.node_out_edges(rr_node).size();
if (num_fanout_in_tile == num_fanout_required) {

2
openfpga_flow/tasks/basic_tests/tile_organization/hetero_fabric_tile/config/task.conf
View File

@ -24,7 +24,7 @@ openfpga_pb_pin_fixup_command = pb_pin_fixup --verbose
openfpga_vpr_device=3x2
openfpga_vpr_route_chan_width=40
openfpga_group_tile_config_file=${PATH:TASK_DIR}/config/tile_config.xml
openfpga_verilog_testbench_options=--explicit_port_mapping
openfpga_verilog_testbench_options=
[ARCHITECTURES]
arch0=${PATH:OPENFPGA_PATH}/openfpga_flow/vpr_arch/k4_frac_N8_tileable_reset_softadder_register_scan_chain_dsp8_nonLR_caravel_io_skywater130nm.xml