diff --git a/openfpga/src/fabric/build_memory_modules.cpp b/openfpga/src/fabric/build_memory_modules.cpp
index 95f15a69b..9bfc45e6f 100644
--- a/openfpga/src/fabric/build_memory_modules.cpp
+++ b/openfpga/src/fabric/build_memory_modules.cpp
@@ -1544,11 +1544,15 @@ int add_physical_memory_module(ModuleManager& module_manager,
       BasicPort des_port = module_manager.module_port(des_module, des_port_id);
       /* Build nets */
       for (size_t ipin = 0; ipin < des_port.pins().size(); ++ipin) {
+        VTR_LOGV(verbose,
+                 "Building net '%s[%lu].%s[%lu]' -> '%s[%lu].%s[%lu]\n",
+                 module_manager.module_name(phy_mem_module).c_str(), phy_mem_instance, src_port.get_name().c_str(), curr_mem_pin_index[port_type], 
+                 module_manager.module_name(des_module).c_str(), des_instance, des_port.get_name().c_str(), des_port.pins()[ipin]);
         /* Create a net and add source and sink to it */
         ModuleNetId net = create_module_source_pin_net(
           module_manager, curr_module, phy_mem_module, phy_mem_instance,
           src_port_id, src_port.pins()[curr_mem_pin_index[port_type]]);
-        if (module_manager.valid_module_net_id(curr_module, net)) {
+        if (!module_manager.valid_module_net_id(curr_module, net)) {
           return CMD_EXEC_FATAL_ERROR;
         }
         /* Add net sink */