From bb8e7e25c2b5c41aa49f3ca6e83456a61cbd7814 Mon Sep 17 00:00:00 2001 From: tangxifan Date: Sat, 16 Jan 2021 21:27:12 -0700 Subject: [PATCH] [Tool] Start deploying design constraints in repack engine --- openfpga/src/base/openfpga_repack.cpp | 1 + openfpga/src/repack/repack.cpp | 10 +++++++++- openfpga/src/repack/repack.h | 2 ++ 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/openfpga/src/base/openfpga_repack.cpp b/openfpga/src/base/openfpga_repack.cpp index b5a6d8a9a..872de054c 100644 --- a/openfpga/src/base/openfpga_repack.cpp +++ b/openfpga/src/base/openfpga_repack.cpp @@ -45,6 +45,7 @@ int repack(OpenfpgaContext& openfpga_ctx, g_vpr_ctx.clustering(), openfpga_ctx.mutable_vpr_device_annotation(), openfpga_ctx.mutable_vpr_clustering_annotation(), + repack_design_constraints, cmd_context.option_enable(cmd, opt_verbose)); build_physical_lut_truth_tables(openfpga_ctx.mutable_vpr_clustering_annotation(), diff --git a/openfpga/src/repack/repack.cpp b/openfpga/src/repack/repack.cpp index 83956dfc9..958dd7545 100644 --- a/openfpga/src/repack/repack.cpp +++ b/openfpga/src/repack/repack.cpp @@ -339,6 +339,7 @@ void add_lb_router_nets(LbRouter& lb_router, const VprDeviceAnnotation& device_annotation, const ClusteringContext& clustering_ctx, const VprClusteringAnnotation& clustering_annotation, + const RepackDesignConstraints& design_constraints, const ClusterBlockId& block_id, const bool& verbose) { size_t net_counter = 0; @@ -542,6 +543,7 @@ void repack_cluster(const AtomContext& atom_ctx, const ClusteringContext& clustering_ctx, const VprDeviceAnnotation& device_annotation, VprClusteringAnnotation& clustering_annotation, + const RepackDesignConstraints& design_constraints, const ClusterBlockId& block_id, const bool& verbose) { /* Get the pb graph that current clustered block is mapped to */ @@ -563,6 +565,7 @@ void repack_cluster(const AtomContext& atom_ctx, /* Add nets to be routed with source and terminals */ add_lb_router_nets(lb_router, lb_type, lb_rr_graph, atom_ctx, device_annotation, clustering_ctx, const_cast(clustering_annotation), + design_constraints, block_id, verbose); /* Initialize the modes to expand routing trees with the physical modes in device annotation @@ -607,12 +610,15 @@ void repack_clusters(const AtomContext& atom_ctx, const ClusteringContext& clustering_ctx, const VprDeviceAnnotation& device_annotation, VprClusteringAnnotation& clustering_annotation, + const RepackDesignConstraints& design_constraints, const bool& verbose) { vtr::ScopedStartFinishTimer timer("Repack clustered blocks to physical implementation of logical tile"); for (auto blk_id : clustering_ctx.clb_nlist.blocks()) { repack_cluster(atom_ctx, clustering_ctx, - device_annotation, clustering_annotation, + device_annotation, + clustering_annotation, + design_constraints, blk_id, verbose); } } @@ -632,6 +638,7 @@ void pack_physical_pbs(const DeviceContext& device_ctx, const ClusteringContext& clustering_ctx, VprDeviceAnnotation& device_annotation, VprClusteringAnnotation& clustering_annotation, + const RepackDesignConstraints& design_constraints, const bool& verbose) { /* build the routing resource graph for each logical tile */ @@ -642,6 +649,7 @@ void pack_physical_pbs(const DeviceContext& device_ctx, /* Call the LbRouter to re-pack each clustered block to physical implementation */ repack_clusters(atom_ctx, clustering_ctx, const_cast(device_annotation), clustering_annotation, + design_constraints, verbose); } diff --git a/openfpga/src/repack/repack.h b/openfpga/src/repack/repack.h index 8121a58bd..3ca3a613f 100644 --- a/openfpga/src/repack/repack.h +++ b/openfpga/src/repack/repack.h @@ -8,6 +8,7 @@ #include "vpr_device_annotation.h" #include "vpr_clustering_annotation.h" #include "vpr_routing_annotation.h" +#include "repack_design_constraints.h" /******************************************************************** * Function declaration @@ -21,6 +22,7 @@ void pack_physical_pbs(const DeviceContext& device_ctx, const ClusteringContext& clustering_ctx, VprDeviceAnnotation& device_annotation, VprClusteringAnnotation& clustering_annotation, + const RepackDesignConstraints& design_constraints, const bool& verbose); } /* end namespace openfpga */