[vpr] now support the definition of subtile in custom pin location, such io[3:4].a2f[0:0]

libs/libarchfpga/src/read_xml_arch_file.cpp

@@ -542,8 +542,8 @@ static void SetupPinLocationsAndPinClasses(pugi::xml_node Locations,
 
         //Verify that all top-level pins have had thier locations specified
 
-        //Record all the specified pins
+        //Record all the specified pins, (capacity, port_name, index)
-        std::map<std::string, std::set<int>> port_pins_with_specified_locations;
+        std::map<int, std::map<std::string, std::set<int>>> port_pins_with_specified_locations;
         for (int w = 0; w < PhysicalTileType->width; ++w) {
             for (int h = 0; h < PhysicalTileType->height; ++h) {
                 for (e_side side : {TOP, RIGHT, BOTTOM, LEFT}) {
@@ -551,11 +551,22 @@ static void SetupPinLocationsAndPinClasses(pugi::xml_node Locations,
                         const char* pin_spec = PhysicalTileType->pin_loc_assignments[w][h][side][itoken];
                         InstPort inst_port(PhysicalTileType->pin_loc_assignments[w][h][side][itoken]);
 
-                        //A pin specification should contain only the block name, and not any instace count information
+                        //A pin specification may contain instance count, but should be in the range of capacity
+                        int inst_lsb = 0;
+                        int inst_msb = PhysicalTileType->capacity - 1;
                         if (inst_port.instance_low_index() != InstPort::UNSPECIFIED || inst_port.instance_high_index() != InstPort::UNSPECIFIED) {
-                            archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations),
+                            /* Extract range numbers */
-                                           "Pin location specification '%s' should not contain an instance range (should only be the block name)",
+                            inst_lsb = inst_port.instance_low_index();
-                                           pin_spec);
+                            inst_msb = inst_port.instance_high_index();
+                            if (inst_lsb > inst_msb) {
+                                std::swap(inst_lsb, inst_msb);
+                            }
+                            /* Check if we have a valid range */
+                            if (inst_lsb < 0 || inst_msb > PhysicalTileType->capacity - 1) {
+                                archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations),
+                                               "Pin location specification '%s' contain an out-of-range instance. Expect [%d:%d]",
+                                               pin_spec, 0, PhysicalTileType->capacity - 1);
+                            }
                         }
 
                         //Check that the block name matches
@@ -592,9 +603,11 @@ static void SetupPinLocationsAndPinClasses(pugi::xml_node Locations,
                         VTR_ASSERT(pin_low_idx >= 0);
                         VTR_ASSERT(pin_high_idx >= 0);
 
-                        for (int ipin = pin_low_idx; ipin <= pin_high_idx; ++ipin) {
+                        for (int iinst = inst_lsb; iinst <= inst_msb; ++iinst) {
-                            //Record that the pin has it's location specified
+                            for (int ipin = pin_low_idx; ipin <= pin_high_idx; ++ipin) {
-                            port_pins_with_specified_locations[inst_port.port_name()].insert(ipin);
+                                //Record that the pin has it's location specified
+                                port_pins_with_specified_locations[iinst][inst_port.port_name()].insert(ipin);
+                            }
                         }
                     }
                 }
@@ -602,13 +615,15 @@ static void SetupPinLocationsAndPinClasses(pugi::xml_node Locations,
         }
 
         //Check for any pins missing location specs
-        for (const auto& port : PhysicalTileType->ports) {
+        for (int iinst = 0; iinst < PhysicalTileType->capacity; ++iinst) {
-            for (int ipin = 0; ipin < port.num_pins; ++ipin) {
+            for (const auto& port : PhysicalTileType->ports) {
-                if (!port_pins_with_specified_locations[port.name].count(ipin)) {
+                for (int ipin = 0; ipin < port.num_pins; ++ipin) {
-                    //Missing
+                    if (!port_pins_with_specified_locations[iinst][port.name].count(ipin)) {
-                    archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations),
+                        //Missing
-                                   "Pin '%s.%s[%d]' has no pin location specificed (a location is required for pattern=\"custom\")",
+                        archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations),
-                                   PhysicalTileType->name, port.name, ipin);
+                                       "Pin '%s[%d].%s[%d]' has no pin location specificed (a location is required for pattern=\"custom\")",
+                                       PhysicalTileType->name, iinst, port.name, ipin);
+                    }
                 }
             }
         }
@@ -820,10 +835,16 @@ static void LoadPinLoc(pugi::xml_node Locations,
                                                                                     type,
                                                                                     type->pin_loc_assignments[width][height][side][pin],
                                                                                     loc_data);
+                        /* Get the offset in the capacity range */
+                        auto capacity_range = ProcessInstanceString<t_physical_tile_type_ptr>(Locations,
+                                                                                              type,
+                                                                                              type->pin_loc_assignments[width][height][side][pin],
+                                                                                              loc_data);
+                        VTR_ASSERT(0 <= capacity_range.first && capacity_range.second < type->capacity);
 
                         for (int pin_num = pin_range.first; pin_num < pin_range.second; ++pin_num) {
                             VTR_ASSERT(pin_num < type->num_pins / type->capacity);
-                            for (int capacity = 0; capacity < type->capacity; ++capacity) {
+                            for (int capacity = capacity_range.first; capacity <= capacity_range.second; ++capacity) {
                                 type->pinloc[width][height][side][pin_num + capacity * type->num_pins / type->capacity] = true;
                                 type->pin_width_offset[pin_num + capacity * type->num_pins / type->capacity] += width;
                                 type->pin_height_offset[pin_num + capacity * type->num_pins / type->capacity] += height;
@@ -847,6 +868,106 @@ static void LoadPinLoc(pugi::xml_node Locations,
     }
 }
 
+/* Parse the string to extract instance range, e.g., io[4:7] -> (4, 7)
+ * If no instance range is explicitly defined, we assume the range of type capacity, i.e., (0, capacity - 1) */
+template<typename T>
+static std::pair<int, int> ProcessInstanceString(pugi::xml_node Locations,
+                                                 T type,
+                                                 const char* pin_loc_string,
+                                                 const pugiutil::loc_data& loc_data) {
+    int num_tokens;
+    auto tokens = GetTokensFromString(pin_loc_string, &num_tokens);
+
+    int token_index = 0;
+    auto token = tokens[token_index];
+
+    if (token.type != TOKEN_STRING || 0 != strcmp(token.data, type->name)) {
+        archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations),
+                       "Wrong physical type name of the port: %s\n", pin_loc_string);
+    }
+
+    token_index++;
+    token = tokens[token_index];
+
+    int first_inst = 0;
+    int last_inst = type->capacity - 1;
+ 
+    /* If there is a dot, such as io.input[0:3], it indicates the full range of the capacity, the default value should be returned */
+    if (token.type == TOKEN_DOT) {
+      freeTokens(tokens, num_tokens);
+      return std::make_pair(first_inst, last_inst);
+    }
+
+    /* If the string contains index for capacity range, e.g., io[3:3].in[0:5], we skip the capacity range here. */
+    if (token.type != TOKEN_OPEN_SQUARE_BRACKET) {
+        archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations),
+                       "No open square bracket present: %s\n", pin_loc_string);
+    }
+
+    token_index++;
+    token = tokens[token_index];
+
+    if (token.type != TOKEN_INT) {
+        archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations),
+                       "No integer to indicate least significant pin index: %s\n", pin_loc_string);
+    }
+
+    first_inst = vtr::atoi(token.data);
+
+    token_index++;
+    token = tokens[token_index];
+
+    // Single pin is specified
+    if (token.type != TOKEN_COLON) {
+        if (token.type != TOKEN_CLOSE_SQUARE_BRACKET) {
+            archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations),
+                           "No closing bracket: %s\n", pin_loc_string);
+        }
+
+        token_index++;
+
+        if (token_index != num_tokens) {
+            archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations),
+                           "pin location should be completed, but more tokens are present: %s\n", pin_loc_string);
+        }
+
+        freeTokens(tokens, num_tokens);
+        return std::make_pair(first_inst, first_inst);
+    }
+
+    token_index++;
+    token = tokens[token_index];
+
+    if (token.type != TOKEN_INT) {
+        archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations),
+                       "No integer to indicate most significant pin index: %s\n", pin_loc_string);
+    }
+
+    int last_inst = vtr::atoi(token.data);
+
+    token_index++;
+    token = tokens[token_index];
+
+    if (token.type != TOKEN_CLOSE_SQUARE_BRACKET) {
+        archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations),
+                       "No closed square bracket: %s\n", pin_loc_string);
+    }
+
+    token_index++;
+
+    if (token_index != num_tokens) {
+        archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations),
+                       "pin location should be completed, but more tokens are present: %s\n", pin_loc_string);
+    }
+
+    if (first_inst > last_inst) {
+        std::swap(first_inst, last_inst);
+    }
+
+    freeTokens(tokens, num_tokens);
+    return std::make_pair(first_inst, last_inst);
+}
+
 template<typename T>
 static std::pair<int, int> ProcessPinString(pugi::xml_node Locations,
                                             T type,
@@ -866,6 +987,21 @@ static std::pair<int, int> ProcessPinString(pugi::xml_node Locations,
     token_index++;
     token = tokens[token_index];
 
+    /* If the string contains index for capacity range, e.g., io[3:3].in[0:5], we skip the capacity range here. */
+    if (token.type == TOKEN_OPEN_SQUARE_BRACKET) {
+        while (token.type != TOKEN_CLOSE_SQUARE_BRACKET) {
+            token_index++;
+            token = tokens[token_index];
+            if (token_index == num_tokens) {
+                archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations),
+                               "Found an open '[' but miss close ']' of the port: %s\n", pin_loc_string);
+            }
+        }
+    }
+
+    token_index++;
+    token = tokens[token_index];
+
     if (token.type != TOKEN_DOT) {
         archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations),
                        "No dot is present to separate type name and port name: %s\n", pin_loc_string);