[lib] developing io pin table data structure
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@ -20,6 +20,7 @@ set_target_properties(libpcf PROPERTIES PREFIX "") #Avoid extra 'lib' prefix
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#Specify link-time dependancies
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target_link_libraries(libpcf
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libopenfpgautil
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libarchfpga
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libarchopenfpga
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libvtrutil
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libpugixml
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@ -0,0 +1,74 @@
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#include <algorithm>
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#include "vtr_assert.h"
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#include "vtr_log.h"
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#include "io_pin_table.h"
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/* begin namespace openfpga */
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namespace openfpga {
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/************************************************************************
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* Member functions for class IoPinTable
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***********************************************************************/
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/************************************************************************
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* Constructors
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***********************************************************************/
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IoPinTable::IoPinTable() {
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return;
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}
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/************************************************************************
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* Public Accessors : aggregates
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***********************************************************************/
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IoPinTable::io_pin_table_range IoPinTable::internal_pins() const {
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return vtr::make_range(pin_ids_.begin(), pin_ids_.end());
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}
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/************************************************************************
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* Public Accessors : Basic data query
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***********************************************************************/
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openfpga::BasicPort IoPinTable::internal_pin(const IoPinTableId& pin_id) const {
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/* validate the pin_id */
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VTR_ASSERT(valid_pin_id(pin_id));
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return internal_pins_[pin_id];
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}
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bool IoPinTable::empty() const {
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return 0 == pin_ids_.size();
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}
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/************************************************************************
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* Public Mutators
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***********************************************************************/
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void IoPinTable::reserve_pins(const size_t& num_pins) {
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pin_ids_.reserve(num_pins);
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internal_pins_.reserve(num_pins);
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external_pins_.reserve(num_pins);
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pin_sides_.reserve(num_pins);
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pin_directions_.reserve(num_pins);
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}
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IoPinTableId IoPinTable::create_pin() {
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/* Create a new id */
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IoPinTableId pin_id = IoPinTableId(pin_ids_.size());
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pin_ids_.push_back(pin_id);
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internal_pins_.emplace_back();
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external_pins_.emplace_back();
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pin_sides_.emplace_back(NUM_SIDES);
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pin_directions_.emplace_back(NUM_IO_DIRECTIONS);
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return pin_id;
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}
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/************************************************************************
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* Internal invalidators/validators
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***********************************************************************/
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/* Validators */
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bool IoPinTable::valid_pin_id(const IoPinTableId& pin_id) const {
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return ( size_t(pin_id) < pin_ids_.size() ) && ( pin_id == pin_ids_[pin_id] );
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}
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} /* end namespace openfpga */
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@ -12,6 +12,9 @@
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#include "vtr_vector.h"
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#include "vtr_geometry.h"
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/* Headers from libarchfpga library */
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#include "physical_types.h"
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/* Headers from openfpgautil library */
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#include "openfpga_port.h"
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@ -62,7 +65,7 @@ class IoPinTable {
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NUM_IO_DIRECTIONS
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};
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public: /* Constructors */
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IoPinTables();
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IoPinTable();
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public: /* Accessors: aggregates */
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/* Walk through the internal pins. We do not walk through external pins because they are not unique in the table.
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* An external pin may be accessible by two internal pins
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@ -79,8 +82,8 @@ class IoPinTable {
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/* Reserve to be memory efficent */
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void reserve_pins(const size_t& num_pins);
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/* Add a pin constraint to storage */
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IoPinTableId create_pin(const openfpga::BasicPort& pin);
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/* Add a pin to storage */
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IoPinTableId create_pin();
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public: /* Public invalidators/validators */
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/* Show if the pin id is a valid for data queries */
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@ -93,7 +96,7 @@ class IoPinTable {
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vtr::vector<IoPinTableId, BasicPort> internal_pins_;
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vtr::vector<IoPinTableId, BasicPort> external_pins_;
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vtr::vector<IoPinTableId, e_side> pin_sides_;
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vtr::vector<IoPinTableId, e_io_direction> pin_drections_;
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vtr::vector<IoPinTableId, e_io_direction> pin_directions_;
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};
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} /* end namespace openfpga */
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