From b86bd1ca68cf5bd056dbb0c7e6b73ec161c89e84 Mon Sep 17 00:00:00 2001 From: coolbreeze413 Date: Fri, 19 Nov 2021 18:06:06 +0530 Subject: [PATCH] re-enable counter_5clock,sdc_controller, lut_adder tests --- .../regression_test_scripts/quicklogic_reg_test.sh | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/openfpga_flow/regression_test_scripts/quicklogic_reg_test.sh b/openfpga_flow/regression_test_scripts/quicklogic_reg_test.sh index 26a76e322..2d3bd1202 100755 --- a/openfpga_flow/regression_test_scripts/quicklogic_reg_test.sh +++ b/openfpga_flow/regression_test_scripts/quicklogic_reg_test.sh @@ -8,14 +8,12 @@ PYTHON_EXEC=python3.8 ############################################## echo -e "QuickLogic regression tests"; -# TODO: Disabled all the tests here because Quicklogic's synthesis script is not in Yosys v0.10 release. Will bring back once Quicklogic manages to merge their contribution to Yosys upstream - echo -e "Testing yosys flow using custom ys script for running quicklogic device"; run-task quicklogic_tests/flow_test --debug --show_thread_logs -##echo -e "Testing yosys flow using custom ys script for running multi-clock quicklogic device"; -##run-task quicklogic_tests/counter_5clock_test --debug --show_thread_logs -##run-task quicklogic_tests/sdc_controller_test --debug --show_thread_logs -## -##echo -e "Testing yosys flow using custom ys script for adders in quicklogic device"; -##run-task quicklogic_tests/lut_adder_test --debug --show_thread_logs +echo -e "Testing yosys flow using custom ys script for running multi-clock quicklogic device"; +run-task quicklogic_tests/counter_5clock_test --debug --show_thread_logs +run-task quicklogic_tests/sdc_controller_test --debug --show_thread_logs + +echo -e "Testing yosys flow using custom ys script for adders in quicklogic device"; +run-task quicklogic_tests/lut_adder_test --debug --show_thread_logs