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[engine] adapt vpr wrapper to the latest main.cpp from vtr

This commit is contained in:
tangxifan 2022-08-23 14:28:05 -07:00
parent 892770a8fb
commit b3e4a06969
2 changed files with 5 additions and 8 deletions
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4
openfpga/src/fabric/build_top_module_connection.cpp
View File

@ -453,6 +453,10 @@ void add_top_module_nets_connect_grids_and_cb(ModuleManager& module_manager,
ModulePortId sink_grid_port_id = module_manager.find_module_port(sink_grid_module, sink_grid_port_name);
VTR_ASSERT(true == module_manager.valid_module_port_id(sink_grid_module, sink_grid_port_id));
BasicPort sink_grid_port = module_manager.module_port(sink_grid_module, sink_grid_port_id);
VTR_LOG("src: %s[%d:%d] -> sink: %s[%ld:%ld]\n",
src_cb_port.get_name().c_str(), src_cb_port.get_lsb(), src_cb_port.get_msb(),
sink_grid_port.get_name().c_str(), sink_grid_port.get_lsb(), sink_grid_port.get_msb()
);
/* Source and sink port should match in size */
VTR_ASSERT(src_cb_port.get_width() == sink_grid_port.get_width());

9
openfpga/src/vpr_wrapper/vpr_main.cpp
View File

@ -62,14 +62,7 @@ int vpr(int argc, char** argv) {
}
auto& timing_ctx = g_vpr_ctx.timing();
VTR_LOG("Timing analysis took %g seconds (%g STA, %g slack) (%zu full updates: %zu setup, %zu hold, %zu combined).\n",
timing_ctx.stats.timing_analysis_wallclock_time(),
timing_ctx.stats.sta_wallclock_time,
timing_ctx.stats.slack_wallclock_time,
timing_ctx.stats.num_full_updates(),
timing_ctx.stats.num_full_setup_updates,
timing_ctx.stats.num_full_hold_updates,
timing_ctx.stats.num_full_setup_hold_updates);
print_timing_stats("Flow", timing_ctx.stats);
/* TODO: move this to the end of flow
* free data structures