[test] fixed a bug
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@ -21,6 +21,8 @@ openfpga_arch_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_arch/k4_N4_40nm_
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openfpga_sim_setting_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_simulation_settings/auto_sim_openfpga.xml
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openfpga_group_tile_config_option=--group_tile ${PATH:TASK_DIR}/config/tile_config.xml
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openfpga_add_fpga_core_module=
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openfpga_vpr_device=auto
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openfpga_vpr_route_chan_width=20
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[ARCHITECTURES]
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arch0=${PATH:OPENFPGA_PATH}/openfpga_flow/vpr_arch/k4_N4_tileable_TileOrgzTl_40nm.xml
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