[FPGA-Verilog] Fix syntax errors
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@ -68,9 +68,9 @@ void print_verilog_preconfig_top_module_ports(std::fstream &fp,
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block_name = netlist_annotation.block_name(atom_blk);
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block_name = netlist_annotation.block_name(atom_blk);
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}
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}
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/* For output block, remove the prefix which is added by VPR */
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/* For output block, remove the prefix which is added by VPR */
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std::vector<std::string> prefix_to_remove;
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std::vector<std::string> output_port_prefix_to_remove;
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prefix_to_remove.push_back(std::string(VPR_BENCHMARK_OUT_PORT_PREFIX));
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output_port_prefix_to_remove.push_back(std::string(VPR_BENCHMARK_OUT_PORT_PREFIX));
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prefix_to_remove.push_back(std::string(OPENFPGA_BENCHMARK_OUT_PORT_PREFIX));
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output_port_prefix_to_remove.push_back(std::string(OPENFPGA_BENCHMARK_OUT_PORT_PREFIX));
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if (AtomBlockType::OUTPAD == atom_ctx.nlist.block_type(atom_blk)) {
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if (AtomBlockType::OUTPAD == atom_ctx.nlist.block_type(atom_blk)) {
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for (const std::string& prefix_to_remove : output_port_prefix_to_remove) {
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for (const std::string& prefix_to_remove : output_port_prefix_to_remove) {
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if (!prefix_to_remove.empty()) {
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if (!prefix_to_remove.empty()) {
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