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[test] add repack design constraints files

This commit is contained in:
tangxifan 2022-10-13 11:22:48 -07:00
parent 5cf315958d
commit b0be27b384
3 changed files with 10 additions and 0 deletions
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4
openfpga_flow/tasks/basic_tests/k4_series/k4n4_rstOnLut/config/repack_design_constraints.xml Normal file
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@ -0,0 +1,4 @@
<repack_design_constraints>
<!-- Intended to be dummy -->
</repack_design_constraints>

1
openfpga_flow/tasks/basic_tests/k4_series/k4n4_rstOnLut/config/task.conf
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@ -19,6 +19,7 @@ fpga_flow=yosys_vpr
openfpga_shell_template=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_shell_scripts/ignore_global_nets_on_pins_example_script.openfpga
openfpga_arch_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_arch/k4_frac_N4_fracff_40nm_cc_openfpga.xml
openfpga_sim_setting_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_simulation_settings/fixed_sim_openfpga.xml
openfpga_repack_design_constraint_file=${PATH:TASK_DIR}/config/repack_design_constraints.xml
[ARCHITECTURES]
arch0=${PATH:OPENFPGA_PATH}/openfpga_flow/vpr_arch/k4_frac_N4_tileable_fracff_rstOnLut_40nm.xml

5
openfpga_flow/tasks/basic_tests/k4_series/k4n4_rstOnLut_strong/config/repack_design_constraints.xml Normal file
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@ -0,0 +1,5 @@
<repack_design_constraints>
<pin_constraint pb_type="clb" pin="reset[0]" net="rst"/>
<pin_constraint pb_type="io" pin="reset[0]" net="rst"/>
</repack_design_constraints>