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[FPGA-Verilog] Fixed a bug on invalid option of a command

This commit is contained in:
tangxifan 2022-01-25 13:45:44 -08:00
parent 25143d07f1
commit b09e13b42c
1 changed files with 3 additions and 0 deletions
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3
openfpga/src/base/openfpga_verilog_command.cpp
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@ -215,6 +215,9 @@ ShellCommandId add_openfpga_write_preconfigured_testbench_command(openfpga::Shel
CommandOptionId default_net_type_opt = shell_cmd.add_option("default_net_type", false, "Set the default net type for Verilog netlists. Default value is 'none'"); CommandOptionId default_net_type_opt = shell_cmd.add_option("default_net_type", false, "Set the default net type for Verilog netlists. Default value is 'none'");
shell_cmd.set_option_require_value(default_net_type_opt, openfpga::OPT_STRING); shell_cmd.set_option_require_value(default_net_type_opt, openfpga::OPT_STRING);
/* Add an option '--no_time_stamp' */
shell_cmd.add_option("no_time_stamp", false, "Do not print a time stamp in the output files");
/* Add an option '--verbose' */ /* Add an option '--verbose' */
shell_cmd.add_option("verbose", false, "Enable verbose output"); shell_cmd.add_option("verbose", false, "Enable verbose output");