diff --git a/libopenfpga/libarchopenfpga/src/pb_type_annotation.cpp b/libopenfpga/libarchopenfpga/src/pb_type_annotation.cpp index d04e39b72..b38796c9c 100644 --- a/libopenfpga/libarchopenfpga/src/pb_type_annotation.cpp +++ b/libopenfpga/libarchopenfpga/src/pb_type_annotation.cpp @@ -69,7 +69,7 @@ std::string PbTypeAnnotation::circuit_model_name() const { return circuit_model_name_; } -int PbTypeAnnotation::physical_pb_type_index_factor() const { +float PbTypeAnnotation::physical_pb_type_index_factor() const { return physical_pb_type_index_factor_; } @@ -164,7 +164,7 @@ void PbTypeAnnotation::set_circuit_model_name(const std::string& name) { circuit_model_name_ = name; } -void PbTypeAnnotation::set_physical_pb_type_index_factor(const int& value) { +void PbTypeAnnotation::set_physical_pb_type_index_factor(const float& value) { VTR_ASSERT(true == is_operating_pb_type()); physical_pb_type_index_factor_ = value; } diff --git a/libopenfpga/libarchopenfpga/src/pb_type_annotation.h b/libopenfpga/libarchopenfpga/src/pb_type_annotation.h index a969ee93d..e80acc3dc 100644 --- a/libopenfpga/libarchopenfpga/src/pb_type_annotation.h +++ b/libopenfpga/libarchopenfpga/src/pb_type_annotation.h @@ -45,7 +45,7 @@ class PbTypeAnnotation { std::string idle_mode_name() const; std::vector mode_bits() const; std::string circuit_model_name() const; - int physical_pb_type_index_factor() const; + float physical_pb_type_index_factor() const; int physical_pb_type_index_offset() const; std::vector port_names() const; BasicPort physical_pb_type_port(const std::string& port_name) const; @@ -63,7 +63,7 @@ class PbTypeAnnotation { void set_idle_mode_name(const std::string& name); void set_mode_bits(const std::vector& mode_bits); void set_circuit_model_name(const std::string& name); - void set_physical_pb_type_index_factor(const int& value); + void set_physical_pb_type_index_factor(const float& value); void set_physical_pb_type_index_offset(const int& value); void add_pb_type_port_pair(const std::string& operating_pb_port_name, const BasicPort& physical_pb_port); @@ -119,7 +119,7 @@ class PbTypeAnnotation { * operating pb_type adder[5] with a full path clb.fle[arith].adder[5] * to physical pb_type adder[10] with a full path clb.fle[physical].adder[10] */ - int physical_pb_type_index_factor_; + float physical_pb_type_index_factor_; /* The offset aims to align the indices for pb_type between operating and physical modes, * especially when an operating mode contains multiple pb_type (num_pb>1) diff --git a/libopenfpga/libarchopenfpga/src/read_xml_pb_type_annotation.cpp b/libopenfpga/libarchopenfpga/src/read_xml_pb_type_annotation.cpp index a17e970b7..743e23741 100644 --- a/libopenfpga/libarchopenfpga/src/read_xml_pb_type_annotation.cpp +++ b/libopenfpga/libarchopenfpga/src/read_xml_pb_type_annotation.cpp @@ -156,7 +156,7 @@ void read_xml_pb_type_annotation(pugi::xml_node& xml_pb_type, /* If this is an operating pb_type, index factor and offset may be optional needed */ if (true == pb_type_annotation.is_operating_pb_type()) { - pb_type_annotation.set_physical_pb_type_index_factor(get_attribute(xml_pb_type, "physical_pb_type_index_factor", loc_data, pugiutil::ReqOpt::OPTIONAL).as_int(1)); + pb_type_annotation.set_physical_pb_type_index_factor(get_attribute(xml_pb_type, "physical_pb_type_index_factor", loc_data, pugiutil::ReqOpt::OPTIONAL).as_float(1.)); pb_type_annotation.set_physical_pb_type_index_offset(get_attribute(xml_pb_type, "physical_pb_type_index_offset", loc_data, pugiutil::ReqOpt::OPTIONAL).as_int(0)); } diff --git a/openfpga/src/annotation/annotate_pb_graph.cpp b/openfpga/src/annotation/annotate_pb_graph.cpp index bf93cf28e..2b78f2f0e 100644 --- a/openfpga/src/annotation/annotate_pb_graph.cpp +++ b/openfpga/src/annotation/annotate_pb_graph.cpp @@ -405,6 +405,7 @@ void rec_build_vpr_physical_pb_graph_node_annotation(t_pb_graph_node* pb_graph_n * (size_t)vpr_device_annotation.pb_graph_node_unique_index(pb_graph_node) + vpr_device_annotation.physical_pb_type_index_offset(pb_graph_node->pb_type) ); + t_pb_graph_node* physical_pb_graph_node = vpr_device_annotation.pb_graph_node(physical_pb_type, physical_pb_graph_node_id); VTR_ASSERT(nullptr != physical_pb_graph_node); vpr_device_annotation.add_physical_pb_graph_node(pb_graph_node, physical_pb_graph_node); diff --git a/openfpga/src/annotation/vpr_device_annotation.cpp b/openfpga/src/annotation/vpr_device_annotation.cpp index 9be30591d..dfbcde112 100644 --- a/openfpga/src/annotation/vpr_device_annotation.cpp +++ b/openfpga/src/annotation/vpr_device_annotation.cpp @@ -165,12 +165,12 @@ t_pb_graph_node* VprDeviceAnnotation::physical_pb_graph_node(t_pb_graph_node* pb return physical_pb_graph_nodes_.at(pb_graph_node); } -int VprDeviceAnnotation::physical_pb_type_index_factor(t_pb_type* pb_type) const { +float VprDeviceAnnotation::physical_pb_type_index_factor(t_pb_type* pb_type) const { /* Ensure that the pb_type is in the list */ - std::map::const_iterator it = physical_pb_type_index_factors_.find(pb_type); + std::map::const_iterator it = physical_pb_type_index_factors_.find(pb_type); if (it == physical_pb_type_index_factors_.end()) { /* Default value is 1 */ - return 1; + return 1.; } return physical_pb_type_index_factors_.at(pb_type); } @@ -374,11 +374,11 @@ void VprDeviceAnnotation::add_physical_pb_graph_node(t_pb_graph_node* operating_ physical_pb_graph_nodes_[operating_pb_graph_node] = physical_pb_graph_node; } -void VprDeviceAnnotation::add_physical_pb_type_index_factor(t_pb_type* pb_type, const int& factor) { +void VprDeviceAnnotation::add_physical_pb_type_index_factor(t_pb_type* pb_type, const float& factor) { /* Warn any override attempt */ - std::map::const_iterator it = physical_pb_type_index_factors_.find(pb_type); + std::map::const_iterator it = physical_pb_type_index_factors_.find(pb_type); if (it != physical_pb_type_index_factors_.end()) { - VTR_LOG_WARN("Override the annotation between operating pb_type '%s' and it physical pb_type index factor '%d'!\n", + VTR_LOG_WARN("Override the annotation between operating pb_type '%s' and it physical pb_type index factor '%f'!\n", pb_type->name, factor); } diff --git a/openfpga/src/annotation/vpr_device_annotation.h b/openfpga/src/annotation/vpr_device_annotation.h index 0ecff4371..1cfdcd412 100644 --- a/openfpga/src/annotation/vpr_device_annotation.h +++ b/openfpga/src/annotation/vpr_device_annotation.h @@ -57,7 +57,7 @@ class VprDeviceAnnotation { /* Get the pointer to a pb_graph node using an unique index */ t_pb_graph_node* pb_graph_node(t_pb_type* pb_type, const PbGraphNodeId& unique_index) const; t_pb_graph_node* physical_pb_graph_node(t_pb_graph_node* pb_graph_node) const; - int physical_pb_type_index_factor(t_pb_type* pb_type) const; + float physical_pb_type_index_factor(t_pb_type* pb_type) const; int physical_pb_type_index_offset(t_pb_type* pb_type) const; int physical_pb_pin_rotate_offset(t_port* pb_port) const; @@ -88,7 +88,7 @@ class VprDeviceAnnotation { void add_pb_graph_node_unique_index(t_pb_graph_node* pb_graph_node); void add_physical_pb_graph_node(t_pb_graph_node* operating_pb_graph_node, t_pb_graph_node* physical_pb_graph_node); - void add_physical_pb_type_index_factor(t_pb_type* pb_type, const int& factor); + void add_physical_pb_type_index_factor(t_pb_type* pb_type, const float& factor); void add_physical_pb_type_index_offset(t_pb_type* pb_type, const int& offset); void add_physical_pb_pin_rotate_offset(t_port* pb_port, const int& offset); void add_physical_pb_graph_pin(t_pb_graph_pin* operating_pb_graph_pin, t_pb_graph_pin* physical_pb_graph_pin); @@ -99,7 +99,7 @@ class VprDeviceAnnotation { private: /* Internal data */ /* Pair a regular pb_type to its physical pb_type */ std::map physical_pb_types_; - std::map physical_pb_type_index_factors_; + std::map physical_pb_type_index_factors_; std::map physical_pb_type_index_offsets_; /* Pair a physical mode for a pb_type diff --git a/openfpga/src/repack/repack.cpp b/openfpga/src/repack/repack.cpp index 02f943b1c..e554a63ed 100644 --- a/openfpga/src/repack/repack.cpp +++ b/openfpga/src/repack/repack.cpp @@ -277,7 +277,7 @@ void repack_cluster(const DeviceContext& device_ctx, /* Run the router */ bool route_success = lb_router.try_route(lb_rr_graph, atom_ctx.nlist, verbose); - if (true == route_success) { + if (false == route_success) { VTR_LOGV(verbose, "Reroute failed\n"); exit(1); } diff --git a/openfpga/test_script/s298_k6_frac.openfpga b/openfpga/test_script/s298_k6_frac.openfpga index 91c5fa551..a985511c4 100644 --- a/openfpga/test_script/s298_k6_frac.openfpga +++ b/openfpga/test_script/s298_k6_frac.openfpga @@ -4,8 +4,11 @@ vpr ./test_vpr_arch/k6_frac_N10_40nm.xml ./test_blif/s298.blif --write_rr_graph # Read OpenFPGA architecture definition read_openfpga_arch -f ./test_openfpga_arch/k6_frac_N10_40nm_openfpga.xml +# Write out the architecture XML as a proof +#write_openfpga_arch -f ./arch_echo.xml + # Annotate the OpenFPGA architecture to VPR data base -link_openfpga_arch #--verbose +link_openfpga_arch --verbose # Check and correct any naming conflicts in the BLIF netlist check_netlist_naming_conflict --fix --report ./netlist_renaming.xml