put routing module builder online
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cf440f92d3
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@ -72,6 +72,7 @@ void build_fabric(OpenfpgaContext& openfpga_context,
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openfpga_context.mutable_module_graph() = build_device_module_graph(g_vpr_ctx.device(),
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openfpga_context.mutable_module_graph() = build_device_module_graph(g_vpr_ctx.device(),
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const_cast<const OpenfpgaContext&>(openfpga_context),
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const_cast<const OpenfpgaContext&>(openfpga_context),
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cmd_context.option_enable(cmd, opt_compress_routing),
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cmd_context.option_enable(cmd, opt_duplicate_grid_pin),
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cmd_context.option_enable(cmd, opt_duplicate_grid_pin),
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cmd_context.option_enable(cmd, opt_verbose));
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cmd_context.option_enable(cmd, opt_verbose));
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}
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}
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@ -15,7 +15,7 @@
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#include "build_wire_modules.h"
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#include "build_wire_modules.h"
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#include "build_memory_modules.h"
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#include "build_memory_modules.h"
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#include "build_grid_modules.h"
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#include "build_grid_modules.h"
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//#include "build_routing_modules.h"
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#include "build_routing_modules.h"
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//#include "build_top_module.h"
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//#include "build_top_module.h"
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#include "build_device_module.h"
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#include "build_device_module.h"
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@ -28,6 +28,7 @@ namespace openfpga {
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*******************************************************************/
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*******************************************************************/
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ModuleManager build_device_module_graph(const DeviceContext& vpr_device_ctx,
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ModuleManager build_device_module_graph(const DeviceContext& vpr_device_ctx,
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const OpenfpgaContext& openfpga_ctx,
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const OpenfpgaContext& openfpga_ctx,
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const bool& compress_routing,
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const bool& duplicate_grid_pin,
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const bool& duplicate_grid_pin,
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const bool& verbose) {
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const bool& verbose) {
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vtr::ScopedStartFinishTimer timer("Build fabric module graph");
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vtr::ScopedStartFinishTimer timer("Build fabric module graph");
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@ -76,17 +77,24 @@ ModuleManager build_device_module_graph(const DeviceContext& vpr_device_ctx,
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openfpga_ctx.arch().config_protocol.type(),
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openfpga_ctx.arch().config_protocol.type(),
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sram_model, duplicate_grid_pin, verbose);
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sram_model, duplicate_grid_pin, verbose);
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//if (TRUE == vpr_setup.FPGA_SPICE_Opts.compact_routing_hierarchy) {
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if (true == compress_routing) {
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// build_unique_routing_modules(module_manager, L_device_rr_gsb, arch.spice->circuit_lib,
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build_unique_routing_modules(module_manager,
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// arch.sram_inf.verilog_sram_inf_orgz->type, sram_model,
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vpr_device_ctx,
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// vpr_setup.RoutingArch, rr_switches);
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openfpga_ctx.vpr_device_annotation(),
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//} else {
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openfpga_ctx.device_rr_gsb(),
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// VTR_ASSERT(FALSE == vpr_setup.FPGA_SPICE_Opts.compact_routing_hierarchy);
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openfpga_ctx.arch().circuit_lib,
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// build_flatten_routing_modules(module_manager, L_device_rr_gsb, arch.spice->circuit_lib,
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openfpga_ctx.arch().config_protocol.type(),
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// arch.sram_inf.verilog_sram_inf_orgz->type, sram_model,
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sram_model, verbose);
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// vpr_setup.RoutingArch, rr_switches);
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} else {
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//}
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VTR_ASSERT_SAFE(false == compress_routing);
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build_flatten_routing_modules(module_manager,
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vpr_device_ctx,
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openfpga_ctx.vpr_device_annotation(),
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openfpga_ctx.device_rr_gsb(),
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openfpga_ctx.arch().circuit_lib,
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openfpga_ctx.arch().config_protocol.type(),
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sram_model, verbose);
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}
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/* Build FPGA fabric top-level module */
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/* Build FPGA fabric top-level module */
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//build_top_module(module_manager, arch.spice->circuit_lib,
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//build_top_module(module_manager, arch.spice->circuit_lib,
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@ -16,6 +16,7 @@ namespace openfpga {
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ModuleManager build_device_module_graph(const DeviceContext& vpr_device_ctx,
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ModuleManager build_device_module_graph(const DeviceContext& vpr_device_ctx,
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const OpenfpgaContext& openfpga_ctx,
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const OpenfpgaContext& openfpga_ctx,
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const bool& compress_routing,
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const bool& duplicate_grid_pin,
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const bool& duplicate_grid_pin,
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const bool& verbose);
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const bool& verbose);
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,41 @@
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#ifndef BUILD_ROUTING_MODULES_H
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#define BUILD_ROUTING_MODULES_H
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/********************************************************************
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* Include header files that are required by function declaration
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*******************************************************************/
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#include "vpr_context.h"
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#include "vpr_device_annotation.h"
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#include "device_rr_gsb.h"
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#include "mux_library.h"
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#include "circuit_library.h"
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#include "module_manager.h"
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/********************************************************************
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* Function declaration
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*******************************************************************/
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/* begin namespace openfpga */
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namespace openfpga {
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void build_flatten_routing_modules(ModuleManager& module_manager,
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const DeviceContext& device_ctx,
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const VprDeviceAnnotation& device_annotation,
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const DeviceRRGSB& device_rr_gsb,
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const CircuitLibrary& circuit_lib,
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const e_config_protocol_type& sram_orgz_type,
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const CircuitModelId& sram_model,
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const bool& verbose);
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void build_unique_routing_modules(ModuleManager& module_manager,
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const DeviceContext& device_ctx,
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const VprDeviceAnnotation& device_annotation,
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const DeviceRRGSB& device_rr_gsb,
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const CircuitLibrary& circuit_lib,
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const e_config_protocol_type& sram_orgz_type,
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const CircuitModelId& sram_model,
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const bool& verbose);
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} /* end namespace openfpga */
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#endif
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@ -81,4 +81,51 @@ std::vector<RRSwitchId> get_rr_graph_driver_switches(const RRGraph& rr_graph,
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return driver_switches;
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return driver_switches;
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}
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}
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/************************************************************************
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* Find the driver nodes for a node in the rr_graph
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***********************************************************************/
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std::vector<RRNodeId> get_rr_graph_driver_nodes(const RRGraph& rr_graph,
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const RRNodeId& node) {
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std::vector<RRNodeId> driver_nodes;
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for (const RREdgeId& edge : rr_graph.node_in_edges(node)) {
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driver_nodes.push_back(rr_graph.edge_src_node(edge));
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}
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return driver_nodes;
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}
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/************************************************************************
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* Find the configurable driver nodes for a node in the rr_graph
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***********************************************************************/
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std::vector<RRNodeId> get_rr_graph_configurable_driver_nodes(const RRGraph& rr_graph,
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const RRNodeId& node) {
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std::vector<RRNodeId> driver_nodes;
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for (const RREdgeId& edge : rr_graph.node_in_edges(node)) {
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/* Bypass non-configurable edges */
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if (false == rr_graph.edge_is_configurable(edge)) {
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continue;
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}
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driver_nodes.push_back(rr_graph.edge_src_node(edge));
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}
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return driver_nodes;
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}
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/************************************************************************
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* Find the configurable driver nodes for a node in the rr_graph
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***********************************************************************/
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std::vector<RRNodeId> get_rr_graph_non_configurable_driver_nodes(const RRGraph& rr_graph,
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const RRNodeId& node) {
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std::vector<RRNodeId> driver_nodes;
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for (const RREdgeId& edge : rr_graph.node_in_edges(node)) {
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/* Bypass configurable edges */
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if (true == rr_graph.edge_is_configurable(edge)) {
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continue;
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}
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driver_nodes.push_back(rr_graph.edge_src_node(edge));
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}
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return driver_nodes;
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}
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} /* end namespace openfpga */
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} /* end namespace openfpga */
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@ -26,6 +26,15 @@ vtr::Point<size_t> get_track_rr_node_end_coordinate(const RRGraph& rr_graph,
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std::vector<RRSwitchId> get_rr_graph_driver_switches(const RRGraph& rr_graph,
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std::vector<RRSwitchId> get_rr_graph_driver_switches(const RRGraph& rr_graph,
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const RRNodeId& node);
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const RRNodeId& node);
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std::vector<RRNodeId> get_rr_graph_driver_nodes(const RRGraph& rr_graph,
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const RRNodeId& node);
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std::vector<RRNodeId> get_rr_graph_configurable_driver_nodes(const RRGraph& rr_graph,
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const RRNodeId& node);
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std::vector<RRNodeId> get_rr_graph_non_configurable_driver_nodes(const RRGraph& rr_graph,
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const RRNodeId& node);
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} /* end namespace openfpga */
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} /* end namespace openfpga */
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#endif
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#endif
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