riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

put routing module builder online

This commit is contained in:
tangxifan 2020-02-13 17:35:29 -07:00
parent cf440f92d3
commit afe8278670
7 changed files with 1120 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
openfpga/src/base/openfpga_build_fabric.cpp
View File

@ -72,6 +72,7 @@ void build_fabric(OpenfpgaContext& openfpga_context,
openfpga_context.mutable_module_graph() = build_device_module_graph(g_vpr_ctx.device(),
const_cast<const OpenfpgaContext&>(openfpga_context),
cmd_context.option_enable(cmd, opt_compress_routing),
cmd_context.option_enable(cmd, opt_duplicate_grid_pin),
cmd_context.option_enable(cmd, opt_verbose));
}

32
openfpga/src/fabric/build_device_module.cpp
View File

@ -15,7 +15,7 @@
#include "build_wire_modules.h"
#include "build_memory_modules.h"
#include "build_grid_modules.h"
//#include "build_routing_modules.h"
#include "build_routing_modules.h"
//#include "build_top_module.h"
#include "build_device_module.h"
@ -28,6 +28,7 @@ namespace openfpga {
*******************************************************************/
ModuleManager build_device_module_graph(const DeviceContext& vpr_device_ctx,
const OpenfpgaContext& openfpga_ctx,
const bool& compress_routing,
const bool& duplicate_grid_pin,
const bool& verbose) {
vtr::ScopedStartFinishTimer timer("Build fabric module graph");
@ -76,17 +77,24 @@ ModuleManager build_device_module_graph(const DeviceContext& vpr_device_ctx,
openfpga_ctx.arch().config_protocol.type(),
sram_model, duplicate_grid_pin, verbose);
//if (TRUE == vpr_setup.FPGA_SPICE_Opts.compact_routing_hierarchy) {
// build_unique_routing_modules(module_manager, L_device_rr_gsb, arch.spice->circuit_lib,
// arch.sram_inf.verilog_sram_inf_orgz->type, sram_model,
// vpr_setup.RoutingArch, rr_switches);
//} else {
// VTR_ASSERT(FALSE == vpr_setup.FPGA_SPICE_Opts.compact_routing_hierarchy);
// build_flatten_routing_modules(module_manager, L_device_rr_gsb, arch.spice->circuit_lib,
// arch.sram_inf.verilog_sram_inf_orgz->type, sram_model,
// vpr_setup.RoutingArch, rr_switches);
//}
if (true == compress_routing) {
build_unique_routing_modules(module_manager,
vpr_device_ctx,
openfpga_ctx.vpr_device_annotation(),
openfpga_ctx.device_rr_gsb(),
openfpga_ctx.arch().circuit_lib,
openfpga_ctx.arch().config_protocol.type(),
sram_model, verbose);
} else {
VTR_ASSERT_SAFE(false == compress_routing);
build_flatten_routing_modules(module_manager,
vpr_device_ctx,
openfpga_ctx.vpr_device_annotation(),
openfpga_ctx.device_rr_gsb(),
openfpga_ctx.arch().circuit_lib,
openfpga_ctx.arch().config_protocol.type(),
sram_model, verbose);
}
/* Build FPGA fabric top-level module */
//build_top_module(module_manager, arch.spice->circuit_lib,

1
openfpga/src/fabric/build_device_module.h
View File

@ -16,6 +16,7 @@ namespace openfpga {
ModuleManager build_device_module_graph(const DeviceContext& vpr_device_ctx,
const OpenfpgaContext& openfpga_ctx,
const bool& compress_routing,
const bool& duplicate_grid_pin,
const bool& verbose);

1001
openfpga/src/fabric/build_routing_modules.cpp Normal file
View File

File diff suppressed because it is too large Load Diff

41
openfpga/src/fabric/build_routing_modules.h Normal file
View File

@ -0,0 +1,41 @@
#ifndef BUILD_ROUTING_MODULES_H
#define BUILD_ROUTING_MODULES_H
/********************************************************************
* Include header files that are required by function declaration
*******************************************************************/
#include "vpr_context.h"
#include "vpr_device_annotation.h"
#include "device_rr_gsb.h"
#include "mux_library.h"
#include "circuit_library.h"
#include "module_manager.h"
/********************************************************************
* Function declaration
*******************************************************************/
/* begin namespace openfpga */
namespace openfpga {
void build_flatten_routing_modules(ModuleManager& module_manager,
const DeviceContext& device_ctx,
const VprDeviceAnnotation& device_annotation,
const DeviceRRGSB& device_rr_gsb,
const CircuitLibrary& circuit_lib,
const e_config_protocol_type& sram_orgz_type,
const CircuitModelId& sram_model,
const bool& verbose);
void build_unique_routing_modules(ModuleManager& module_manager,
const DeviceContext& device_ctx,
const VprDeviceAnnotation& device_annotation,
const DeviceRRGSB& device_rr_gsb,
const CircuitLibrary& circuit_lib,
const e_config_protocol_type& sram_orgz_type,
const CircuitModelId& sram_model,
const bool& verbose);
} /* end namespace openfpga */
#endif

47
openfpga/src/utils/openfpga_rr_graph_utils.cpp
View File

@ -81,4 +81,51 @@ std::vector<RRSwitchId> get_rr_graph_driver_switches(const RRGraph& rr_graph,
return driver_switches;
}
/************************************************************************
* Find the driver nodes for a node in the rr_graph
***********************************************************************/
std::vector<RRNodeId> get_rr_graph_driver_nodes(const RRGraph& rr_graph,
const RRNodeId& node) {
std::vector<RRNodeId> driver_nodes;
for (const RREdgeId& edge : rr_graph.node_in_edges(node)) {
driver_nodes.push_back(rr_graph.edge_src_node(edge));
}
return driver_nodes;
}
/************************************************************************
* Find the configurable driver nodes for a node in the rr_graph
***********************************************************************/
std::vector<RRNodeId> get_rr_graph_configurable_driver_nodes(const RRGraph& rr_graph,
const RRNodeId& node) {
std::vector<RRNodeId> driver_nodes;
for (const RREdgeId& edge : rr_graph.node_in_edges(node)) {
/* Bypass non-configurable edges */
if (false == rr_graph.edge_is_configurable(edge)) {
continue;
}
driver_nodes.push_back(rr_graph.edge_src_node(edge));
}
return driver_nodes;
}
/************************************************************************
* Find the configurable driver nodes for a node in the rr_graph
***********************************************************************/
std::vector<RRNodeId> get_rr_graph_non_configurable_driver_nodes(const RRGraph& rr_graph,
const RRNodeId& node) {
std::vector<RRNodeId> driver_nodes;
for (const RREdgeId& edge : rr_graph.node_in_edges(node)) {
/* Bypass configurable edges */
if (true == rr_graph.edge_is_configurable(edge)) {
continue;
}
driver_nodes.push_back(rr_graph.edge_src_node(edge));
}
return driver_nodes;
}
} /* end namespace openfpga */

9
openfpga/src/utils/openfpga_rr_graph_utils.h
View File

@ -26,6 +26,15 @@ vtr::Point<size_t> get_track_rr_node_end_coordinate(const RRGraph& rr_graph,
std::vector<RRSwitchId> get_rr_graph_driver_switches(const RRGraph& rr_graph,
const RRNodeId& node);
std::vector<RRNodeId> get_rr_graph_driver_nodes(const RRGraph& rr_graph,
const RRNodeId& node);
std::vector<RRNodeId> get_rr_graph_configurable_driver_nodes(const RRGraph& rr_graph,
const RRNodeId& node);
std::vector<RRNodeId> get_rr_graph_non_configurable_driver_nodes(const RRGraph& rr_graph,
const RRNodeId& node);
} /* end namespace openfpga */
#endif