diff --git a/docs/source/manual/file_formats/clock_network.rst b/docs/source/manual/file_formats/clock_network.rst
index 1f075a3d4..c1fa9c695 100644
--- a/docs/source/manual/file_formats/clock_network.rst
+++ b/docs/source/manual/file_formats/clock_network.rst
@@ -224,7 +224,10 @@ For example,
     <spine>
   </clock_network>
 
-where the clock routing can be driven at (x=1,y=1) by the output pins ``O[0:3]`` of tile ``clb`` in a VPR architecture description file:
+
+where clock spine ``spine0`` will be driven by other programmable blocks at (1, 1), as highlighted in purple in the :numref:`fig_prog_clock_network_example_2x2_perimeter_cb`
+
+To be specific, the clock routing can be driven at (x=1,y=1) by the output pins ``O[0:3]`` of tile ``clb`` in a VPR architecture description file:
 
 .. code-block:: xml
 
diff --git a/docs/source/manual/file_formats/figures/prog_clk_network_example_2x2_perimeter_cb.png b/docs/source/manual/file_formats/figures/prog_clk_network_example_2x2_perimeter_cb.png
index e74ded94f..4ec057d1c 100644
Binary files a/docs/source/manual/file_formats/figures/prog_clk_network_example_2x2_perimeter_cb.png and b/docs/source/manual/file_formats/figures/prog_clk_network_example_2x2_perimeter_cb.png differ