diff --git a/openfpga/src/fabric/build_top_module_child_fine_grained_instance.cpp b/openfpga/src/fabric/build_top_module_child_fine_grained_instance.cpp index 7e3fcfa2f..914e384e1 100644 --- a/openfpga/src/fabric/build_top_module_child_fine_grained_instance.cpp +++ b/openfpga/src/fabric/build_top_module_child_fine_grained_instance.cpp @@ -454,8 +454,7 @@ int build_top_module_fine_grained_child_instances( const ConfigProtocol& config_protocol, const CircuitModelId& sram_model, const bool& frame_view, const bool& compact_routing_hierarchy, const bool& duplicate_grid_pin, const FabricKey& fabric_key, - const bool& group_config_block, - const bool& perimeter_cb, + const bool& group_config_block, const bool& perimeter_cb, const bool& verbose) { int status = CMD_EXEC_SUCCESS; std::map> cb_instance_ids; diff --git a/openfpga/src/fabric/build_top_module_child_fine_grained_instance.h b/openfpga/src/fabric/build_top_module_child_fine_grained_instance.h index c24338f99..b4d1677d8 100644 --- a/openfpga/src/fabric/build_top_module_child_fine_grained_instance.h +++ b/openfpga/src/fabric/build_top_module_child_fine_grained_instance.h @@ -44,8 +44,7 @@ int build_top_module_fine_grained_child_instances( const ConfigProtocol& config_protocol, const CircuitModelId& sram_model, const bool& frame_view, const bool& compact_routing_hierarchy, const bool& duplicate_grid_pin, const FabricKey& fabric_key, - const bool& group_config_block, - const bool& perimeter_cb, + const bool& group_config_block, const bool& perimeter_cb, const bool& verbose); } /* end namespace openfpga */ diff --git a/openfpga/src/fabric/build_top_module_connection.cpp b/openfpga/src/fabric/build_top_module_connection.cpp index 62c612097..027078093 100644 --- a/openfpga/src/fabric/build_top_module_connection.cpp +++ b/openfpga/src/fabric/build_top_module_connection.cpp @@ -1290,9 +1290,11 @@ static int build_top_module_global_net_from_clock_arch_tree( vtr::Point entry_cb_coord(entry_point.x(), entry_point.y()); const RRGSB& rr_gsb = device_rr_gsb.get_gsb_by_cb_coordinate( entry_track_type, entry_cb_coord); - vtr::Point entry_unique_cb_coord = device_rr_gsb.get_cb_unique_module(entry_track_type, entry_cb_coord).get_cb_coordinate(entry_track_type); + vtr::Point entry_unique_cb_coord = + device_rr_gsb.get_cb_unique_module(entry_track_type, entry_cb_coord) + .get_cb_coordinate(entry_track_type); std::string cb_module_name = generate_connection_block_module_name( - entry_track_type, entry_unique_cb_coord); + entry_track_type, entry_unique_cb_coord); ModuleId cb_module = module_manager.find_module(cb_module_name); size_t cb_instance = cb_instance_ids.at(entry_track_type)[entry_point.x()][entry_point.y()]; @@ -1324,8 +1326,7 @@ int add_top_module_global_ports_from_grid_modules( const DeviceRRGSB& device_rr_gsb, const std::map>& cb_instance_ids, const vtr::Matrix& grid_instance_ids, const ClockNetwork& clk_ntwk, - const RRClockSpatialLookup& rr_clock_lookup, - const bool& perimeter_cb) { + const RRClockSpatialLookup& rr_clock_lookup, const bool& perimeter_cb) { int status = CMD_EXEC_SUCCESS; /* Add the global ports which are NOT yet added to the top-level module diff --git a/openfpga/src/fabric/build_top_module_connection.h b/openfpga/src/fabric/build_top_module_connection.h index 08a642e07..1c04d0e25 100644 --- a/openfpga/src/fabric/build_top_module_connection.h +++ b/openfpga/src/fabric/build_top_module_connection.h @@ -42,8 +42,7 @@ int add_top_module_global_ports_from_grid_modules( const DeviceRRGSB& device_rr_gsb, const std::map>& cb_instance_ids, const vtr::Matrix& grid_instance_ids, const ClockNetwork& clk_ntwk, - const RRClockSpatialLookup& rr_clock_lookup, - const bool& perimeter_cb); + const RRClockSpatialLookup& rr_clock_lookup, const bool& perimeter_cb); void add_top_module_nets_prog_clock(ModuleManager& module_manager, const ModuleId& top_module,