fix bug
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f1547bae8a
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ae6a8cb604
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@ -362,7 +362,8 @@ void DeviceRRGSB::build_unique_module(const RRGraphView& rr_graph) {
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build_cb_unique_module(rr_graph, CHANX);
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build_cb_unique_module(rr_graph, CHANX);
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build_cb_unique_module(rr_graph, CHANY);
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build_cb_unique_module(rr_graph, CHANY);
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build_gsb_unique_module(); /*is_compressed_ flip inside build_gsb_unique_module*/
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build_gsb_unique_module(); /*is_compressed_ flip inside
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build_gsb_unique_module*/
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}
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}
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void DeviceRRGSB::add_gsb_unique_module(const vtr::Point<size_t>& coordinate) {
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void DeviceRRGSB::add_gsb_unique_module(const vtr::Point<size_t>& coordinate) {
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@ -76,8 +76,8 @@ class DeviceRRGSB {
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void reserve(
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void reserve(
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const vtr::Point<size_t>& coordinate); /* Pre-allocate the rr_switch_block
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const vtr::Point<size_t>& coordinate); /* Pre-allocate the rr_switch_block
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array that the device requires */
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array that the device requires */
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void reserve_unique_modules(); /* Pre-allocate the rr_sb_unique_module_id matrix that the
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void reserve_unique_modules(); /* Pre-allocate the rr_sb_unique_module_id
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device requires */
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matrix that the device requires */
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void resize_upon_need(
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void resize_upon_need(
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const vtr::Point<size_t>&
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const vtr::Point<size_t>&
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coordinate); /* Resize the rr_switch_block array if needed */
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coordinate); /* Resize the rr_switch_block array if needed */
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@ -125,12 +125,6 @@ int build_fabric_template(T& openfpga_ctx, const Command& cmd,
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cmd.option_name(opt_duplicate_grid_pin).c_str());
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cmd.option_name(opt_duplicate_grid_pin).c_str());
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return CMD_EXEC_FATAL_ERROR;
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return CMD_EXEC_FATAL_ERROR;
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}
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}
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if (!openfpga_ctx.device_rr_gsb().is_compressed()) {
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VTR_LOG_ERROR(
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"Option '%s' requires unique blocks to be valid due to a conflict!\n",
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cmd.option_name(opt_group_tile).c_str());
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return CMD_EXEC_FATAL_ERROR;
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}
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}
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}
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/* Conflicts: duplicate_grid_pin does not support any port merge */
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/* Conflicts: duplicate_grid_pin does not support any port merge */
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if (cmd_context.option_enable(cmd, opt_duplicate_grid_pin)) {
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if (cmd_context.option_enable(cmd, opt_duplicate_grid_pin)) {
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@ -153,6 +147,14 @@ int build_fabric_template(T& openfpga_ctx, const Command& cmd,
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openfpga_ctx.mutable_flow_manager().set_compress_routing(true);
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openfpga_ctx.mutable_flow_manager().set_compress_routing(true);
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}
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}
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if (cmd_context.option_enable(cmd, opt_group_tile)) {
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if (!openfpga_ctx.device_rr_gsb().is_compressed()) {
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VTR_LOG_ERROR(
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"Option '%s' requires unique blocks to be valid due to a conflict!\n",
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cmd.option_name(opt_group_tile).c_str());
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return CMD_EXEC_FATAL_ERROR;
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}
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}
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VTR_LOG("\n");
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VTR_LOG("\n");
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/* Record the execution status in curr_status for each command
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/* Record the execution status in curr_status for each command
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