From acc905fa11efea4f27c806a32899167188bbc7d0 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Wed, 18 Jan 2023 18:22:37 -0800
Subject: [PATCH] [arch] add support to route reset to LUTs

---
 .../vpr_arch/k4_frac_N4_tileable_fracff_localRstGen_40nm.xml    | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/openfpga_flow/vpr_arch/k4_frac_N4_tileable_fracff_localRstGen_40nm.xml b/openfpga_flow/vpr_arch/k4_frac_N4_tileable_fracff_localRstGen_40nm.xml
index d5838b9dd..7af70a22a 100644
--- a/openfpga_flow/vpr_arch/k4_frac_N4_tileable_fracff_localRstGen_40nm.xml
+++ b/openfpga_flow/vpr_arch/k4_frac_N4_tileable_fracff_localRstGen_40nm.xml
@@ -609,7 +609,7 @@
 		     Since all our outputs LUT outputs go to a BLE output, and have a delay of 
 		     25 ps to do so, we subtract 25 ps from the 100 ps delay of a feedback
 		     to get the part that should be marked on the crossbar.	 -->
-        <complete name="crossbar" input="clb.I fle[3:0].out" output="fle[3:0].in">
+        <complete name="crossbar" input="clb.I fle[3:0].out clb.reset clb.lreset" output="fle[3:0].in">
           <delay_constant max="95e-12" in_port="clb.I" out_port="fle[3:0].in"/>
           <delay_constant max="75e-12" in_port="fle[3:0].out" out_port="fle[3:0].in"/>
         </complete>