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[core] code format

This commit is contained in:
tangxifan 2023-01-15 12:13:59 -08:00
parent cab7e04901
commit ac8c0e243c
2 changed files with 7 additions and 4 deletions
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6
libs/libpcf/src/base/repack_design_constraints.cpp
View File

@ -69,9 +69,11 @@ std::string RepackDesignConstraints::find_constrained_pin_net(
return constrained_net_name; return constrained_net_name;
} }
openfpga::BasicPort RepackDesignConstraints::net_pin(const std::string& net) const { openfpga::BasicPort RepackDesignConstraints::net_pin(
const std::string& net) const {
openfpga::BasicPort constrained_pin; openfpga::BasicPort constrained_pin;
for (const RepackDesignConstraintId& design_constraint : design_constraints()) { for (const RepackDesignConstraintId& design_constraint :
design_constraints()) {
if (net == repack_design_constraint_nets_[design_constraint]) { if (net == repack_design_constraint_nets_[design_constraint]) {
constrained_pin = pin(design_constraint); constrained_pin = pin(design_constraint);
break; break;

5
openfpga/src/repack/repack.cpp
View File

@ -614,8 +614,9 @@ static void add_lb_router_nets(
} else if (design_constraints.unconstrained_net(constrained_net_name)) { } else if (design_constraints.unconstrained_net(constrained_net_name)) {
constrained_atom_net_id = atom_net_id; constrained_atom_net_id = atom_net_id;
/* Skip for the net which has been constrained on other pins */ /* Skip for the net which has been constrained on other pins */
if (atom_net_id && design_constraints.net_pin( if (atom_net_id &&
atom_ctx.nlist.net_name(atom_net_id)).is_valid()) { design_constraints.net_pin(atom_ctx.nlist.net_name(atom_net_id))
.is_valid()) {
VTR_LOGV(verbose, VTR_LOGV(verbose,
"Skip net '%s' on pin '%s[%d]' during repacking since it has " "Skip net '%s' on pin '%s[%d]' during repacking since it has "
"been constrained to another pin\n", "been constrained to another pin\n",