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add config protocol type information to simulation ini file

This commit is contained in:
tangxifan 2020-07-02 12:26:59 -06:00
parent 81ecfa3197
commit ac22ba28e4
1 changed files with 1 additions and 0 deletions
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openfpga/src/fpga_verilog/simulation_info_writer.cpp
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@ -78,6 +78,7 @@ void print_verilog_simulation_info(const std::string& ini_fname,
ini["SIMULATION_DECK"]["VERILOG_PATH "] = std::string(src_dir); ini["SIMULATION_DECK"]["VERILOG_PATH "] = std::string(src_dir);
ini["SIMULATION_DECK"]["VERILOG_FILE1"] = std::string(DEFINES_VERILOG_FILE_NAME); ini["SIMULATION_DECK"]["VERILOG_FILE1"] = std::string(DEFINES_VERILOG_FILE_NAME);
ini["SIMULATION_DECK"]["VERILOG_FILE2"] = std::string(circuit_name + std::string(TOP_INCLUDE_NETLIST_FILE_NAME_POSTFIX)); ini["SIMULATION_DECK"]["VERILOG_FILE2"] = std::string(circuit_name + std::string(TOP_INCLUDE_NETLIST_FILE_NAME_POSTFIX));
ini["SIMULATION_DECK"]["CONFIG_PROTOCOL"] = std::string(CONFIG_PROTOCOL_TYPE_STRING[config_protocol_type]);
/* Information required by UVM */ /* Information required by UVM */
if (CONFIG_MEM_FRAME_BASED == config_protocol_type) { if (CONFIG_MEM_FRAME_BASED == config_protocol_type) {