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OpenFPGA
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add vtr as submodule

This commit is contained in:
taoli4rs 2022-05-25 22:40:56 -07:00
parent 70e2330f17
commit ac000276c5
2 changed files with 4 additions and 0 deletions
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3
.gitmodules vendored
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@ -6,3 +6,6 @@
[submodule "yosys-plugins"] [submodule "yosys-plugins"]
path = yosys-plugins path = yosys-plugins
url = https://github.com/SymbiFlow/yosys-symbiflow-plugins url = https://github.com/SymbiFlow/yosys-symbiflow-plugins
[submodule "vtr-verilog-to-routing"]
path = vtr-verilog-to-routing
url = git@github.com:verilog-to-routing/vtr-verilog-to-routing.git

1
vtr-verilog-to-routing Submodule

@ -0,0 +1 @@
Subproject commit e8b1b04c579feb0bc881fc95d2f42a42b100f591