move simulation setting annotation to a separated source file
This commit is contained in:
tangxifan
parent
7b18f7cd09
commit
aa66042dfb
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@ -0,0 +1,227 @@
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/********************************************************************
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* This file includes functions that are used to annotate pb_graph_node
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* and pb_graph_pins from VPR to OpenFPGA
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*******************************************************************/
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#include <cmath>
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#include <iterator>
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/* Headers from vtrutil library */
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#include "vtr_assert.h"
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#include "vtr_log.h"
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/* Headers from vpr library */
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#include "timing_info.h"
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#include "AnalysisDelayCalculator.h"
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#include "net_delay.h"
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#include "annotate_simulation_setting.h"
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/* begin namespace openfpga */
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namespace openfpga {
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/********************************************************************
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* Find the average signal density for all the nets of user's benchmark
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*******************************************************************/
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static
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float average_atom_net_signal_density(const AtomContext& atom_ctx,
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const std::unordered_map<AtomNetId, t_net_power>& net_activity) {
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float avg_density = 0.;
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size_t net_cnt = 0;
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/* get the average density of all the nets */
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for (const AtomNetId& atom_net : atom_ctx.nlist.nets()) {
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/* Skip the nets without any activity annotation */
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if (0 == net_activity.count(atom_net)) {
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continue;
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}
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/* Only care non-zero density nets */
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if (0. == net_activity.at(atom_net).density) {
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continue;
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}
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avg_density += net_activity.at(atom_net).density;
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net_cnt++;
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}
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return avg_density / net_cnt;
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}
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/********************************************************************
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* Find the average signal density for all the nets of user's benchmark
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* by applying a weight to each net density
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*******************************************************************/
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static
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float average_weighted_atom_net_signal_density(const AtomContext& atom_ctx,
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const std::unordered_map<AtomNetId, t_net_power>& net_activity) {
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float weighted_avg_density = 0.;
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size_t weighted_net_cnt = 0;
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/* get the average density of all the nets */
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for (const AtomNetId& atom_net : atom_ctx.nlist.nets()) {
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/* Skip the nets without any activity annotation */
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if (0 == net_activity.count(atom_net)) {
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continue;
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}
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/* Only care non-zero density nets */
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if (0. == net_activity.at(atom_net).density) {
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continue;
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}
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/* Consider the weight of fan-out */
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size_t net_weight;
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if (0 == std::distance(atom_ctx.nlist.net_sinks(atom_net).begin(), atom_ctx.nlist.net_sinks(atom_net).end())) {
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net_weight = 1;
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} else {
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VTR_ASSERT(0 < std::distance(atom_ctx.nlist.net_sinks(atom_net).begin(), atom_ctx.nlist.net_sinks(atom_net).end()));
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net_weight = std::distance(atom_ctx.nlist.net_sinks(atom_net).begin(), atom_ctx.nlist.net_sinks(atom_net).end());
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}
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weighted_avg_density += net_activity.at(atom_net).density* net_weight;
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weighted_net_cnt += net_weight;
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}
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return weighted_avg_density / weighted_net_cnt;
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}
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/********************************************************************
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* Find median of signal density of all the nets
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*******************************************************************/
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static
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size_t median_atom_net_signal_density(const AtomContext& atom_ctx,
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const std::unordered_map<AtomNetId, t_net_power>& net_activity) {
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/* Sort the net density */
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std::vector<float> net_densities;
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net_densities.reserve(net_activity.size());
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for (const AtomNetId& atom_net : atom_ctx.nlist.nets()) {
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/* Skip the nets without any activity annotation */
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if (0 == net_activity.count(atom_net)) {
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continue;
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}
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net_densities.push_back(net_activity.at(atom_net).density);
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}
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std::sort(net_densities.begin(), net_densities.end());
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/* Get the median */
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/* check for even case */
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if (net_densities.size() % 2 != 0) {
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return net_densities[size_t(net_densities.size() / 2)];
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}
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return 0.5 * (net_densities[size_t((net_densities.size() - 1) / 2)] + net_densities[size_t((net_densities.size() - 1) / 2)]);
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}
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/********************************************************************
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* Find the number of clock cycles in simulation based on the average signal density
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*******************************************************************/
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static
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size_t recommend_num_sim_clock_cycle(const AtomContext& atom_ctx,
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const std::unordered_map<AtomNetId, t_net_power>& net_activity,
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const float& sim_window_size) {
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float average_density = average_atom_net_signal_density(atom_ctx, net_activity);
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float average_weighted_density = average_weighted_atom_net_signal_density(atom_ctx, net_activity);
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float median_density = median_atom_net_signal_density(atom_ctx, net_activity);
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VTR_LOG("Average net density: %.2f\n",
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average_density);
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VTR_LOG("Median net density: %.2f\n",
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median_density);
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VTR_LOG("Average net density after weighting: %.2f\n",
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average_weighted_density);
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/* We have three choices in selecting the number of clock cycles based on signal density
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* 1. average signal density
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* 2. median signal density
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* 3. a mixed of average and median signal density
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*/
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size_t recmd_num_clock_cycles = 0;
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if ( (0. == median_density)
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&& (0. == average_density) ) {
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recmd_num_clock_cycles = 1;
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VTR_LOG_WARN("All the signal density is zero!\nNumber of clock cycles in simulations are set to be %ld!\n",
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recmd_num_clock_cycles);
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} else if (0. == average_density) {
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recmd_num_clock_cycles = (size_t)round(1 / median_density);
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} else if (0. == median_density) {
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recmd_num_clock_cycles = (size_t)round(1 / average_density);
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} else {
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/* add a sim window size to balance the weight of average density and median density
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* In practice, we find that there could be huge difference between avereage and median values
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* For a reasonable number of simulation clock cycles, we do this window size.
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*/
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recmd_num_clock_cycles = (size_t)round(1 / (sim_window_size * average_density + (1 - sim_window_size) * median_density ));
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VTR_LOG("Window size set for simulation: %.2f\n",
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sim_window_size);
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VTR_LOG("Net density after applying window size : %.2f\n",
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(sim_window_size * average_density + (1 - sim_window_size) * median_density));
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}
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VTR_ASSERT(0 < recmd_num_clock_cycles);
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return recmd_num_clock_cycles;
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}
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/********************************************************************
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* Annotate simulation setting based on VPR results
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* - If the operating clock frequency is set to follow the vpr timing results,
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* we will set a new operating clock frequency here
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* - If the number of clock cycles in simulation is set to be automatically determined,
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* we will infer the number based on the average signal density
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*******************************************************************/
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void annotate_simulation_setting(const AtomContext& atom_ctx,
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const std::unordered_map<AtomNetId, t_net_power>& net_activity,
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SimulationSetting& sim_setting) {
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/* Find if the operating frequency is binded to vpr results */
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if (0. == sim_setting.operating_clock_frequency()) {
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VTR_LOG("User specified the operating clock frequency to use VPR results\n");
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/* Run timing analysis and collect critical path delay
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* This code is copied from function vpr_analysis() in vpr_api.h
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* Should keep updated to latest VPR code base
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* Note:
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* - MUST mention in documentation that VPR should be run in timing enabled mode
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*/
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vtr::vector<ClusterNetId, float*> net_delay;
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vtr::t_chunk net_delay_ch;
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/* Load the net delays */
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net_delay = alloc_net_delay(&net_delay_ch);
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load_net_delay_from_routing(net_delay);
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/* Do final timing analysis */
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auto analysis_delay_calc = std::make_shared<AnalysisDelayCalculator>(atom_ctx.nlist, atom_ctx.lookup, net_delay);
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auto timing_info = make_setup_hold_timing_info(analysis_delay_calc);
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timing_info->update();
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/* Get critical path delay. Update simulation settings */
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float T_crit = timing_info->least_slack_critical_path().delay() * (1. + sim_setting.operating_clock_frequency_slack());
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sim_setting.set_operating_clock_frequency(1 / T_crit);
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VTR_LOG("Use VPR critical path delay %g [ns] with a %g [%] slack in OpenFPGA.\n",
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T_crit / 1e9, sim_setting.operating_clock_frequency_slack() * 100);
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}
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VTR_LOG("Will apply operating clock frequency %g [MHz] to simulations\n",
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sim_setting.operating_clock_frequency() / 1e6);
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if (0. == sim_setting.num_clock_cycles()) {
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/* Find the number of clock cycles to be used in simulation
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* by average over the signal activity
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*/
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VTR_LOG("User specified the number of operating clock cycles to be inferred from signal activities\n");
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/* Use a fixed simulation window size now. TODO: this could be specified by users */
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size_t num_clock_cycles = recommend_num_sim_clock_cycle(atom_ctx,
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net_activity,
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0.5);
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sim_setting.set_num_clock_cycles(num_clock_cycles);
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VTR_LOG("Will apply %lu operating clock cycles to simulations\n",
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sim_setting.num_clock_cycles());
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}
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}
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} /* end namespace openfpga */
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@ -0,0 +1,23 @@
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#ifndef ANNOTATE_SIMULATION_SETTING_H
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#define ANNOTATE_SIMULATION_SETTING_H
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/********************************************************************
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* Include header files that are required by function declaration
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*******************************************************************/
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#include "vpr_context.h"
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#include "openfpga_context.h"
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/********************************************************************
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* Function declaration
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*******************************************************************/
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/* begin namespace openfpga */
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namespace openfpga {
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void annotate_simulation_setting(const AtomContext& atom_ctx,
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const std::unordered_map<AtomNetId, t_net_power>& net_activity,
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SimulationSetting& sim_setting);
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} /* end namespace openfpga */
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#endif
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@ -2,8 +2,6 @@
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* This file includes functions to read an OpenFPGA architecture file
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* This file includes functions to read an OpenFPGA architecture file
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* which are built on the libarchopenfpga library
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* which are built on the libarchopenfpga library
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*******************************************************************/
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*******************************************************************/
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#include <cmath>
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#include <iterator>
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/* Headers from vtrutil library */
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/* Headers from vtrutil library */
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#include "vtr_time.h"
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#include "vtr_time.h"
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@ -11,9 +9,6 @@
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#include "vtr_log.h"
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#include "vtr_log.h"
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/* Headers from vpr library */
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/* Headers from vpr library */
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#include "timing_info.h"
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#include "AnalysisDelayCalculator.h"
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#include "net_delay.h"
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#include "read_activity.h"
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#include "read_activity.h"
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#include "vpr_device_annotation.h"
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#include "vpr_device_annotation.h"
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#include "annotate_pb_graph.h"
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#include "annotate_pb_graph.h"
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#include "annotate_routing.h"
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#include "annotate_routing.h"
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#include "annotate_rr_graph.h"
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#include "annotate_rr_graph.h"
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#include "annotate_simulation_setting.h"
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#include "mux_library_builder.h"
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#include "mux_library_builder.h"
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#include "build_tile_direct.h"
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#include "build_tile_direct.h"
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#include "annotate_placement.h"
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#include "annotate_placement.h"
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@ -55,163 +51,6 @@ bool is_vpr_rr_graph_supported(const RRGraph& rr_graph) {
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return true;
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return true;
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}
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}
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/********************************************************************
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* Find the number of clock cycles in simulation based on the average signal density
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*******************************************************************/
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static
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size_t recommend_num_sim_clock_cycle(const AtomContext& atom_ctx,
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const std::unordered_map<AtomNetId, t_net_power>& net_activity,
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const float& sim_window_size) {
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size_t recmd_num_sim_clock_cycle = 0;
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float avg_density = 0.;
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size_t net_cnt = 0;
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float weighted_avg_density = 0.;
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size_t weighted_net_cnt = 0;
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/* get the average density of all the nets */
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for (const AtomNetId& atom_net : atom_ctx.nlist.nets()) {
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/* Skip the nets without any activity annotation */
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if (0 == net_activity.count(atom_net)) {
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continue;
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}
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/* Only care non-zero density nets */
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if (0. == net_activity.at(atom_net).density) {
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continue;
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}
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avg_density += net_activity.at(atom_net).density;
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net_cnt++;
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/* Consider the weight of fan-out */
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size_t net_weight;
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if (0 == std::distance(atom_ctx.nlist.net_sinks(atom_net).begin(), atom_ctx.nlist.net_sinks(atom_net).end())) {
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net_weight = 1;
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} else {
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VTR_ASSERT(0 < std::distance(atom_ctx.nlist.net_sinks(atom_net).begin(), atom_ctx.nlist.net_sinks(atom_net).end()));
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net_weight = std::distance(atom_ctx.nlist.net_sinks(atom_net).begin(), atom_ctx.nlist.net_sinks(atom_net).end());
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}
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weighted_avg_density += net_activity.at(atom_net).density* net_weight;
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weighted_net_cnt += net_weight;
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}
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avg_density = avg_density / net_cnt;
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weighted_avg_density = weighted_avg_density / weighted_net_cnt;
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/* Sort the net density */
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std::vector<float> net_densities;
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net_densities.reserve(net_cnt);
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for (const AtomNetId& atom_net : atom_ctx.nlist.nets()) {
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/* Skip the nets without any activity annotation */
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if (0 == net_activity.count(atom_net)) {
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continue;
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}
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/* Only care non-zero density nets */
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if (0. == net_activity.at(atom_net).density) {
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continue;
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}
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net_densities.push_back(net_activity.at(atom_net).density);
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}
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std::sort(net_densities.begin(), net_densities.end());
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/* Get the median */
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float median_density = 0.;
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/* check for even case */
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if (net_cnt % 2 != 0) {
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median_density = net_densities[size_t(net_cnt / 2)];
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} else {
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median_density = 0.5 * (net_densities[size_t((net_cnt - 1) / 2)] + net_densities[size_t((net_cnt - 1) / 2)]);
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}
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/* It may be more reasonable to use median
|
|
||||||
* But, if median density is 0, we use average density
|
|
||||||
*/
|
|
||||||
if ((0. == median_density) && (0. == avg_density)) {
|
|
||||||
recmd_num_sim_clock_cycle = 1;
|
|
||||||
VTR_LOG_WARN("All the signal density is zero!\nNumber of clock cycles in simulations are set to be %ld!\n",
|
|
||||||
recmd_num_sim_clock_cycle);
|
|
||||||
} else if (0. == avg_density) {
|
|
||||||
recmd_num_sim_clock_cycle = (int)round(1 / median_density);
|
|
||||||
} else if (0. == median_density) {
|
|
||||||
recmd_num_sim_clock_cycle = (int)round(1 / avg_density);
|
|
||||||
} else {
|
|
||||||
/* add a sim window size to balance the weight of average density and median density
|
|
||||||
* In practice, we find that there could be huge difference between avereage and median values
|
|
||||||
* For a reasonable number of simulation clock cycles, we do this window size.
|
|
||||||
*/
|
|
||||||
recmd_num_sim_clock_cycle = (int)round(1 / (sim_window_size * avg_density + (1 - sim_window_size) * median_density ));
|
|
||||||
}
|
|
||||||
|
|
||||||
VTR_ASSERT(0 < recmd_num_sim_clock_cycle);
|
|
||||||
|
|
||||||
VTR_LOG("Average net density: %.2f\n", avg_density);
|
|
||||||
VTR_LOG("Median net density: %.2f\n", median_density);
|
|
||||||
VTR_LOG("Average net density after weighting: %.2f\n", weighted_avg_density);
|
|
||||||
VTR_LOG("Window size set for Simulation: %.2f\n", sim_window_size);
|
|
||||||
VTR_LOG("Net density after Window size : %.2f\n",
|
|
||||||
(sim_window_size * avg_density + (1 - sim_window_size) * median_density));
|
|
||||||
VTR_LOG("Recommend no. of clock cycles: %ld\n", recmd_num_sim_clock_cycle);
|
|
||||||
|
|
||||||
return recmd_num_sim_clock_cycle;
|
|
||||||
}
|
|
||||||
|
|
||||||
/********************************************************************
|
|
||||||
* Annotate simulation setting based on VPR results
|
|
||||||
* - If the operating clock frequency is set to follow the vpr timing results,
|
|
||||||
* we will set a new operating clock frequency here
|
|
||||||
* - If the number of clock cycles in simulation is set to be automatically determined,
|
|
||||||
* we will infer the number based on the average signal density
|
|
||||||
*******************************************************************/
|
|
||||||
static
|
|
||||||
void annotate_simulation_setting(const AtomContext& atom_ctx,
|
|
||||||
const std::unordered_map<AtomNetId, t_net_power>& net_activity,
|
|
||||||
SimulationSetting& sim_setting) {
|
|
||||||
|
|
||||||
/* Find if the operating frequency is binded to vpr results */
|
|
||||||
if (0. == sim_setting.operating_clock_frequency()) {
|
|
||||||
VTR_LOG("User specified the operating clock frequency to use VPR results\n");
|
|
||||||
/* Run timing analysis and collect critical path delay
|
|
||||||
* This code is copied from function vpr_analysis() in vpr_api.h
|
|
||||||
* Should keep updated to latest VPR code base
|
|
||||||
* Note:
|
|
||||||
* - MUST mention in documentation that VPR should be run in timing enabled mode
|
|
||||||
*/
|
|
||||||
vtr::vector<ClusterNetId, float*> net_delay;
|
|
||||||
vtr::t_chunk net_delay_ch;
|
|
||||||
/* Load the net delays */
|
|
||||||
net_delay = alloc_net_delay(&net_delay_ch);
|
|
||||||
load_net_delay_from_routing(net_delay);
|
|
||||||
|
|
||||||
/* Do final timing analysis */
|
|
||||||
auto analysis_delay_calc = std::make_shared<AnalysisDelayCalculator>(atom_ctx.nlist, atom_ctx.lookup, net_delay);
|
|
||||||
auto timing_info = make_setup_hold_timing_info(analysis_delay_calc);
|
|
||||||
timing_info->update();
|
|
||||||
|
|
||||||
/* Get critical path delay. Update simulation settings */
|
|
||||||
float T_crit = timing_info->least_slack_critical_path().delay() * (1. + sim_setting.operating_clock_frequency_slack());
|
|
||||||
sim_setting.set_operating_clock_frequency(1 / T_crit);
|
|
||||||
VTR_LOG("Use VPR critical path delay %g [ns] with a %g [%] slack in OpenFPGA.\n",
|
|
||||||
T_crit / 1e9, sim_setting.operating_clock_frequency_slack() * 100);
|
|
||||||
}
|
|
||||||
VTR_LOG("Will apply operating clock frequency %g [MHz] to simulations\n",
|
|
||||||
sim_setting.operating_clock_frequency() / 1e6);
|
|
||||||
|
|
||||||
if (0. == sim_setting.num_clock_cycles()) {
|
|
||||||
/* Find the number of clock cycles to be used in simulation by average over the signal activity */
|
|
||||||
|
|
||||||
VTR_LOG("User specified the number of operating clock cycles to be inferred from signal activities\n");
|
|
||||||
size_t num_clock_cycles = recommend_num_sim_clock_cycle(atom_ctx,
|
|
||||||
net_activity,
|
|
||||||
0.5);
|
|
||||||
sim_setting.set_num_clock_cycles(num_clock_cycles);
|
|
||||||
|
|
||||||
VTR_LOG("Will apply %lu operating clock cycles to simulations\n",
|
|
||||||
sim_setting.num_clock_cycles());
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/********************************************************************
|
/********************************************************************
|
||||||
* Top-level function to link openfpga architecture to VPR, including:
|
* Top-level function to link openfpga architecture to VPR, including:
|
||||||
* - physical pb_type
|
* - physical pb_type
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue