further clean-up sample arch.xml
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@ -8,20 +8,26 @@
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each primitives in FPGA architecture
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-->
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<openfpga_architecture>
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<technology>
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<library type="academia" corner="TOP_TT" path="${OPENFPGA_PATH}/openfpga_flow/tech/PTM_45nm/45nm.pm"/>
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<transistors name="logic" type="logic" pn_ratio="2" model_ref="M" vdd="0.9">
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<nmos model_name="nch" chan_length="40e-9" min_width="140e-9" variation="logic_transistor_var"/>
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<pmos model_name="pch" chan_length="40e-9" min_width="140e-9" variation="logic_transistor_var"/>
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<technology_library>
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<transistors name="logic" type="logic">
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<model type="academia" corner="TOP_TT" ref="M" path="${OPENFPGA_PATH}/openfpga_flow/tech/PTM_45nm/45nm.pm"/>
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<design vdd="0.9" pn_ratio="2"/>
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<nmos name="nch" chan_length="40e-9" min_width="140e-9" variation="logic_transistor_var"/>
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<pmos name="pch" chan_length="40e-9" min_width="140e-9" variation="logic_transistor_var"/>
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</transistors>
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<transistors name="io" type="io" pn_ratio="3" model_ref="M" vdd="2.5">
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<nmos model_name="nch_25" chan_length="270e-9" min_width="320e-9" variation="io_transistor_var"/>
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<pmos model_name="pch_25" chan_length="270e-9" min_width="320e-9" variation="io_transistor_var"/>
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<transistors name="io" type="io"/>
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<model type="academia" corner="TT" ref="M" path="${OPENFPGA_PATH}/openfpga_flow/tech/PTM_45nm/45nm.pm"/>
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<design vdd="2.5" pn_ratio="3"/>
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<nmos name="nch_25" chan_length="270e-9" min_width="320e-9" variation="io_transistor_var"/>
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<pmos name="pch_25" chan_length="270e-9" min_width="320e-9" variation="io_transistor_var"/>
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</transistors>
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<rram_devices>
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<rram model_name="mem_rram" rlrs="1e4" rhrs="1e5" variation="mem_rram_var">
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<rram model_name="logic_rram" rlrs="5e3" rhrs="20e6" variation="logic_rram_var">
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</rram_devices>
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<rram name="mem_rram">
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<model type="academia" ref="X" path="${OPENFPGA_PATH}/openfpga_flow/tech/PTM_45nm/rram.pm"/>
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<device rlrs="1e4" rhrs="1e5" variation="mem_rram_var"/>
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</rram>
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<rram name="logic_rram">
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<model type="academia" ref="X" path="${OPENFPGA_PATH}/openfpga_flow/tech/PTM_45nm/rram.pm"/>
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<device rlrs="5e3" rhrs="20e6" variation="logic_rram_var"/>
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</rram>
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<device_variation>
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<variation name="logic_transistor_var" abs_variation="0.1" num_sigma="3"/>
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@ -29,7 +35,7 @@
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<variation name="mem_rram_var" abs_variation="0.1" num_sigma="3"/>
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<variation name="logic_rram_var" abs_variation="0.1" num_sigma="3"/>
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</device_variation>
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</technology>
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</technology_library>
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<circuit_library>
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<circuit_model type="inv_buf" name="INVTX1" prefix="INVTX1" is_default="true">
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<design_technology type="cmos" topology="inverter" size="1"/>
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@ -18,23 +18,36 @@
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*******************************************************************/
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enum e_tech_lib_type {
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TECH_LIB_INDUSTRY,
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TECH_LIB_ACADEMIA
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TECH_LIB_ACADEMIA,
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NUM_TECH_LIB_TYPES
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};
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/* Strings correspond to each technology library type */
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constexpr std::array<const char*, NUM_TECH_LIB_TYPES> TECH_LIB_TYPE_STRING = {{"industry", "academia"}};
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/********************************************************************
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* Types of transistors which may be defined in a technology library
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* Types of transistor groups which may be defined in a technology library
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* We categorize the transistors in terms of their usage in FPGA architecture
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* 1. NMOS transistor used in datapath logic
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* 2. PMOS transistor used in datapath logic
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* 3. NMOS transistor used in the I/O blocks
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* 3. PMOS transistor used in the I/O blocks
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* 1. NMOS transistor
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* 2. PMOS transistor
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*******************************************************************/
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enum e_tech_lib_trans_type {
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TECH_LIB_TRANS_NMOS,
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TECH_LIB_TRANS_PMOS,
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TECH_LIB_TRANS_IO_NMOS,
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TECH_LIB_TRANS_IO_PMOS
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};
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/* Strings correspond to transistor type type */
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constexpr std::array<const char*, NUM_TECH_LIB_TYPES> TECH_LIB_TRANS_TYPE_STRING = {{"industry", "academia"}};
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/********************************************************************
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* Types of transistors which may be defined in a technology library
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* 1. NMOS transistor
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* 2. PMOS transistor
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*******************************************************************/
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enum e_tech_lib_trans_type {
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TECH_LIB_TRANS_NMOS,
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TECH_LIB_TRANS_PMOS,
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};
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/* Strings correspond to transistor type type */
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constexpr std::array<const char*, NUM_TECH_LIB_TYPES> TECH_LIB_TRANS_TYPE_STRING = {{"industry", "academia"}};
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/********************************************************************
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* Process corners supported
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